Patents by Inventor Mark Gallina
Mark Gallina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260122854Abstract: A vapor chamber system may include a vapor chamber and a heat spreader disposed on the vapor chamber. The heat spreader may include a surface facing the vapor chamber. The surface may include one or more protrusions extending toward the vapor chamber. The protrusions may be configured to thermally couple the heat spreader to the vapor chamber. The protrusions may be conical or may comprise elongated wave structures including alternating upper and lower portions forming a corrugated pattern. The protrusions may define cavities between the heat spreader and the vapor chamber configured to direct airflow for enhanced heat dissipation. The vapor chamber may include upper and lower vapor chamber layers defining a vapor zone therebetween, with support pillars extending between the layers. The protrusions may be aligned with the support pillars for structural enhancement and thermal conduction.Type: ApplicationFiled: December 22, 2025Publication date: April 30, 2026Inventors: Min Suet Lim, Chi Chou Cheng, Mark Gallina, Chung Jen Ho, Chihtsung Hu, Jeff Ku, Shih-Yi Lai, Chih-Hao Li, Jagadeesh Radhakrishnan, Ming-Sheng Tsai
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Patent number: 12430283Abstract: Methods, systems, and apparatus to reconfigure a computer are disclosed. An example electronic device includes at least one memory, instructions in the electronic device, and processor circuitry to execute instructions to analyze data corresponding to a first configuration of the electronic device to detect a change associated with the electronic device, the first configuration corresponding to a respective first user profile, determine a second configuration of the electronic device based on the detected change, and adjust a configuration of the electronic device from the first configuration to the second configuration.Type: GrantFiled: December 21, 2021Date of Patent: September 30, 2025Assignee: Intel CorporationInventors: Jianfang Zhu, Ivan Chen, Barnes Cooper, Jianwei Dai, Martin Dixon, Kristoffer Fleming, Mark Gallina, Duncan Glendinning, Deepak Samuel Kirubakaran, Chia-Hung S. Kuo, Yifan Li, Adam Norman, Michael Rosenzweig, Kai P Wang, Jin Yan, Virendra Vikramsinh Adsure
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Publication number: 20250218485Abstract: Techniques and mechanisms for selectively throttling operation of circuitry, wherein said throttling is based on a threshold rate at which a memory is to be refreshed. In an embodiment, a power management unit (PMU) accommodates coupling to receive an identifier of a first refresh rate which has been requested with the random access memory (RAM) device. The PMU provides functionality to calculate a difference between a threshold maximum refresh rate and the first refresh rate. Based on the calculated difference, a throttle action is identified, and one or more control signals are generated to throttle operation of circuitry which is thermally coupled with the RAM device. In another embodiment, the RAM device continues to be refreshed at the first refresh rate during and/or after the throttling of the circuitry.Type: ApplicationFiled: December 27, 2023Publication date: July 3, 2025Applicant: Intel CorporationInventors: Yevgeni Sabin, Tomer Levy, Dor Zvik, Zeev Offen, Mark Gallina, Dorit Shapira, Yoni Aizik
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Patent number: 12235792Abstract: An apparatus and method for temperature-constrained frequency control and scheduling. For example, one embodiment of a processor comprises: a plurality of cores; power management circuitry to control a frequency of each core of the plurality of cores based, at least in part, on a temperature associated with one or more cores of the plurality of cores, the power management circuitry comprising: a temperature limit-driven frequency controller to determine a first frequency limit value based on a temperature of a corresponding core reaching a first threshold; frequency prediction hardware logic to predict a temperature-constrained frequency of the corresponding core based on the first frequency limit value and an initial frequency limit value; and performance determination hardware logic to determine a new performance value for the corresponding core based on the temperature-constrained frequency, the new performance value to be provided to a task scheduler.Type: GrantFiled: March 30, 2023Date of Patent: February 25, 2025Assignee: Intel CorporationInventors: Jianwei Dai, Somvir Singh Dahiya, Mahesh Kumar P, Stephen H. Gunther, Sapumal Wijeratne, Mark Gallina
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Publication number: 20240330234Abstract: An apparatus and method for temperature-constrained frequency control and scheduling. For example, one embodiment of a processor comprises: a plurality of cores; power management circuitry to control a frequency of each core of the plurality of cores based, at least in part, on a temperature associated with one or more cores of the plurality of cores, the power management circuitry comprising: a temperature limit-driven frequency controller to determine a first frequency limit value based on a temperature of a corresponding core reaching a first threshold; frequency prediction hardware logic to predict a temperature-constrained frequency of the corresponding core based on the first frequency limit value and an initial frequency limit value; and performance determination hardware logic to determine a new performance value for the corresponding core based on the temperature-constrained frequency, the new performance value to be provided to a task scheduler.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Inventors: Jianwei DAI, Somvir Singh DAHIYA, Mahesh KUMAR P, Stephen H. GUNTHER, Sapumal WIJERATNE, Mark GALLINA
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Publication number: 20240329722Abstract: An apparatus and method to control temperature ramp rates including temperature spike detection and control. For example, one embodiment of a processor comprises: a plurality of cores to execute instructions; a power management unit to control power consumption of each core of the plurality of cores, the power management unit comprising: a frequency ramp governor or power step governor to determine a frequency ramp rate limit or power step limit for a core of the plurality of cores based, at least in part, on a present frequency or present power metrics of the core; a frequency limiter or voltage limiter to determine a maximum frequency or maximum voltage of the core based, at least in part, on a measured temperature; and limit resolution circuitry to determine a first frequency or a first power level of the core in accordance with the frequency ramp rate limit or the power step limit and the maximum frequency or maximum voltage.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Inventors: Somvir DAHIYA, Scot KELLAR, Stephen H. GUNTHER, Mark GALLINA, Efraim ROTEM, Prasanna JOTHI
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Publication number: 20240202419Abstract: Systems, apparatuses and methods may provide for technology that determines a plurality of transient thermal responses for a corresponding plurality of power source locations on a semiconductor die, obtains corner block list (CBL) representations associated with a plurality of candidate floorplans, and conducts an artificial intelligence (AI) based search of the CBL representations, wherein an output of the AI based search is one or more suggested floorplans having a transient thermal response that is below a thermal threshold.Type: ApplicationFiled: December 13, 2023Publication date: June 20, 2024Inventors: Miaomiao Ma, Adam Norman, Jianfang Olena Zhu, Mackenzie Norman, Mark Gallina, Pei Chun Ch'ng, Xia Zhu, Jagadeesh Radhakrishnan, Soon Khiang Toh, Omer Vikinski, Slade Morgan
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Patent number: 11972303Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.Type: GrantFiled: June 26, 2020Date of Patent: April 30, 2024Assignee: Intel CorporationInventors: Carin Ruiz, Bo Qiu, Columbia Mishra, Arijit Chattopadhyay, Chee Lim Nge, Srikanth Potluri, Jianfang Zhu, Deepak Samuel Kirubakaran, Akhilesh Rallabandi, Mark Gallina, Renji Thomas, James Hermerding, II
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Patent number: 11545410Abstract: Enhanced thermal energy transfer systems for semiconductor packages are provided. A thermally conductive member is disposed in the interstitial space between an upper surface of a semiconductor package and a lower surface of a thermal member. The thermally conductive member is disposed above a first portion of the upper surface of the semiconductor package having a relatively higher thermal energy output when the semiconductor package is operating. A thermal interface material is disposed in the interstitial space and a force applied to the thermal member. The thermally conductive member forms a relatively higher pressure region above the first portion of the semiconductor package and a relatively lower pressure region in other portions of the semiconductor package remote from the thermally conductive member. The increased pressure region proximate the thermally conductive member beneficially enhances the flow of thermal energy from the first portion of the semiconductor package to the thermal member.Type: GrantFiled: December 17, 2018Date of Patent: January 3, 2023Assignee: INTEL CORPORATIONInventors: Mark MacDonald, David Pidwerbecki, Mark Gallina, Jerrod Peterson
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Publication number: 20220114318Abstract: Methods and apparatus for in-field thermal calibration are disclosed. A disclosed example apparatus includes instructions, memory in the apparatus, and processor circuitry. The processor circuitry is to execute the instructions to determine that a system on chip (SOC) package is deployed, the SOC package deployed with a default first thermal model, in response to the determination that the SOC package is deployed, monitor at least one temperature of the SOC package from a sensor and power usage of the SOC package, calibrate a second thermal model based on the at least one temperature and the power usage, and publish the calibrated second thermal model for control of the SOC package.Type: ApplicationFiled: December 20, 2021Publication date: April 14, 2022Inventors: Mark Gallina, Jianfang Zhu, Kristoffer Fleming, Akhllesh Rallabandi, Jianwei Dai
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Publication number: 20220114136Abstract: Methods, systems, and apparatus to reconfigure a computer are disclosed. An example electronic device includes at least one memory, instructions in the electronic device, and processor circuitry to execute instructions to analyze data corresponding to a first configuration of the electronic device to detect a change associated with the electronic device, the first configuration corresponding to a respective first user profile, determine a second configuration of the electronic device based on the detected change, and adjust a configuration of the electronic device from the first configuration to the second configuration.Type: ApplicationFiled: December 21, 2021Publication date: April 14, 2022Inventors: Jianfang Zhu, Ivan Chen, Barnes Cooper, Jianwei Dai, Martin Dixon, Kristoffer Fleming, Mark Gallina, Duncan Glendinning, Deepak Samuel Kirubakaran, Chia-Hung S. Kuo, Yifan Li, Adam Norman, Michael Rosenzweig, Kai P Wang, Jin Yan, Virendra Vikramsinh Adsure
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Publication number: 20200326994Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.Type: ApplicationFiled: June 26, 2020Publication date: October 15, 2020Inventors: Carin Ruiz, Bo Qiu, Columbia Mishra, Arijit Chattopadhyay, Chee Lim Nge, Srikanth Potluri, Jianfang Zhu, Deepak Samuel Kirubakaran, Akhilesh Rallabandi, Mark Gallina, Renji Thomas, James Hermerding II
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Patent number: 10305529Abstract: Systems and methods may provide for a device including a housing, one or more electronic components positioned within the housing, and a first cured resin composition positioned within the housing, the first cured resin composition including a thermal energy storage material and a first filler material. The device may also include a second cured resin composition positioned within the housing, the second cured resin composition including the thermal energy storage material and a second filler material. The first filler material and the second filler material may be different, wherein the first cured resin composition and the second cured resin composition may encompass at least one of the one or more electronic components. In other examples, the electronic components include a power supply and the device complies with an ATEX equipment directive for explosive atmospheres. Moreover, component underfill and/or assembly overmold processes may be used to fabricate the device.Type: GrantFiled: December 26, 2013Date of Patent: May 28, 2019Assignee: Intel CorporationInventors: David Pidwerbecki, Mark Gallina, Mark Hemmeyer, Steven Lofland, Ponniah Ilavarasan, Michael Stewart, Kevin Byrd
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Publication number: 20190139855Abstract: Enhanced thermal energy transfer systems for semiconductor packages are provided. A thermally conductive member is disposed in the interstitial space between an upper surface of a semiconductor package and a lower surface of a thermal member. The thermally conductive member is disposed above a first portion of the upper surface of the semiconductor package having a relatively higher thermal energy output when the semiconductor package is operating. A thermal interface material is disposed in the interstitial space and a force applied to the thermal member. The thermally conductive member forms a relatively higher pressure region above the first portion of the semiconductor package and a relatively lower pressure region in other portions of the semiconductor package remote from the thermally conductive member. The increased pressure region proximate the thermally conductive member beneficially enhances the flow of thermal energy from the first portion of the semiconductor package to the thermal member.Type: ApplicationFiled: December 17, 2018Publication date: May 9, 2019Applicant: Intel CorporationInventors: Mark MacDonald, David Pidwerbecki, Mark Gallina, Jerrod Peterson
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Patent number: 9501112Abstract: Mobile platforms and methods may provide for an integrated circuit such as a system on chip (SoC), a first heat spreader thermally coupled to the integrated circuit and a phase change material configuration thermally coupled to the first heat spreader. The integrated circuit may include logic to operate the integrated circuit in a performance burst mode according to a duty cycle, wherein the performance burst mode causes a phase change material to enter a liquid state within a graphite matrix of the phase change material configuration.Type: GrantFiled: August 10, 2013Date of Patent: November 22, 2016Assignee: Intel CorporationInventors: Daryl Nelson, Kevin Daniel, Daniel Chiang, Mark Gallina, Steven Lofland
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Publication number: 20160269067Abstract: Systems and methods may provide for a device including a housing, one or more electronic components positioned within the housing, and a first cured resin composition positioned within the housing, the first cured resin composition including a thermal energy storage material and a first filler material. The device may also include a second cured resin composition positioned within the housing, the second cured resin composition including the thermal energy storage material and a second filler material. The first filler material and the second filler material may be different, wherein the first cured resin composition and the second cured resin composition may encompass at least one of the one or more electronic components. In other examples, the electronic components include a power supply and the device complies with an ATEX equipment directive for explosive atmospheres. Moreover, component underfill and/or assembly overmold processes may be used to fabricate the device.Type: ApplicationFiled: December 26, 2013Publication date: September 15, 2016Inventors: David PIDWERBECKI, Mark GALLINA, Mark HEMMEYER, Steven LOFLAND, Ponniah ILAVARASAN, Michael STEWART, Kevin BYRD
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Publication number: 20150043161Abstract: Mobile platforms and methods may provide for an integrated circuit such as a system on chip (SoC), a first heat spreader thermally coupled to the integrated circuit and a phase change material configuration thermally coupled to the first heat spreader. The integrated circuit may include logic to operate the integrated circuit in a performance burst mode according to a duty cycle, wherein the performance burst mode causes a phase change material to enter a liquid state within a graphite matrix of the phase change material configuration.Type: ApplicationFiled: August 10, 2013Publication date: February 12, 2015Inventors: Daryl Nelson, Kevin Daniel, Daniel Chiang, Mark Gallina, Steven Lofland
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Publication number: 20070188993Abstract: In some embodiments, a heatsink includes a thermally conductive core and at least ten thermally conductive fins extending quasi-radially from the thermally conductive core, wherein most of the fins are of uniform length, and wherein at least a portion of the thermally conductive core is shaped such that the fins having uniform length form a substantially rectangular cross sectional form factor. Other embodiments are disclosed and claimed.Type: ApplicationFiled: February 14, 2006Publication date: August 16, 2007Inventors: Mark Gallina, Kevin Ceurter
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Publication number: 20050092614Abstract: The force required to seal a surface of an object for electrodeposition may be controlled. For example, the object may rest on a support that carries the majority of the force required for surface sealing. Further, pads mounted on the ends of flexible beams may exert a variable force to establish electrical contact with the object that may be controlled. By controlling the forces exerted on an object damage to the object's surface may be minimized or eliminated.Type: ApplicationFiled: October 29, 2003Publication date: May 5, 2005Inventor: Mark Gallina
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Patent number: D774488Type: GrantFiled: September 8, 2014Date of Patent: December 20, 2016Assignee: Intel CorporationInventors: Aleksander Magi, Hosam Haggag, Terry Pilsner, Hong W. Wong, Steven Lofland, Mark Gallina