Abstract: A means for reliable inter-processor communication in a multi-processor system is described. In accordance with one aspect, a specially-configured serial bus is used as a general-purpose data link between a first processor and a second processor. The serial bus may be an Inter-IC Sound (I2S) bus. In accordance with another aspect, a network interface residing on a second processor is made available to a first processor via a data link established over an I2S bus. This allows the second processor to be used as a proxy and to support remote configuration and network address traversal.

Abstract: An embodiment of the present invention allows the firmware of one processor in a multi-processor system to be updated even if that processor is unstable due to a corruption of system software. For example, in a system that includes a primary processor and one or more secondary processors, an embodiment of the present invention allows the firmware of a secondary processor to be updated even if that processor is unstable due to a corruption of system software. An embodiment of the present invention also enables a network-based firmware update of a processor or microcontroller in a system, such as a consumer electronics device, wherein the processor or microcontroller requires such updates to occur via a serial port.

Abstract: A means for reliable inter-processor communication in a multi-processor system is described. In accordance with one aspect, a specially-configured serial bus is used as a general-purpose data link between a first processor and a second processor. The serial bus may be an Inter-IC Sound (I2S) bus. In accordance with another aspect, a network interface residing on a second processor is made available to a first processor via a data link established over an I2S bus. This allows the second processor to be used as a proxy and to support remote configuration and network address traversal.

Abstract: An embodiment of the present invention allows the firmware of one processor in a multi-processor system to be updated even if that processor is unstable due to a corruption of system software. For example, in a system that includes a primary processor and one or more secondary processors, an embodiment of the present invention allows the firmware of a secondary processor to be updated even if that processor is unstable due to a corruption of system software. An embodiment of the present invention also enables a network-based firmware update of a processor or microcontroller in a system, such as a consumer electronics device, wherein the processor or microcontroller requires such updates to occur via a serial port.

Abstract: A telecommunications system having a software dispatcher is provided for delivering messages between dispatcher clients, i.e., software subsystems that may be in the same process, a different process, or on a different machine. The dispatcher manages a pool of threads to balance the workload. The dispatcher can process both synchronous and asynchronous messages by dispatching the message to all registered subsystems in order of their registered priority.

Abstract: An improved method, apparatus and computer system for automatically reporting of faults in a telephonic network is described. When a network fault is detected, a determination is made by a fault analyzer whether or not the detected fault is a reportable fault. If the detected fault is a reportable fault, then an alarm report based upon the reportable fault is generated which is then distributed based upon a distribution list. The distribution list includes only those destination addresses associated with the reportable fault. The alarm report in distributed to any number and kind of communications devices such as, a pager, an email server, and a control console.

Abstract: A jitter buffer controller (110) allows the depth of the jitter buffer (113) to be adjusted dynamically according to the varying jitter of the current sequence. The jitter buffer controller (110) maintains a cache (109) of previous jitter values. This cache contains exponentially averaged values that represent the long-term behavior of specific destination's jitter characteristics, i.e., a jitter characteristic memory. These values are used to initialize the jitter buffer's depth. The jitter cache prevents the buffer's depth from being initialized with an arbitrary value that disregards the specific destination's jitter characteristics.

Abstract: A telecommunications system having a software dispatcher is provided for delivering messages between dispatcher clients, i.e., software subsystems that may be in the same process, a different process, or on a different machine. The dispatcher manages a pool of threads to balance the workload. The dispatcher can process both synchronous and asynchronous messages by dispatching the message to all registered subsystems in order of their registered priority.