Abstract: A low voltage vacuum field emission device and method for manufacturing is provided. The devices are fabricated by anodizing a heavily doped silicon wafer substrate (12) in concentrated HF solution, forming extremely sharp silicon tips (18) at the silicon to porous silicon interface. The resulting porous silicon layer is then oxidized, and a metal film (22) is deposited by evaporation on the porous silicon. Silicon substrate (12) is the cathode, and metal film dots (22) are the anodes. The I-V characteristics for the field emission devices follow Fowler-Nordheim curves over three decades of current. The I-V characteristics are also utterly independent of temperature up to 250.degree. C. When the oxidized porous silicon layer (OPSL) is about 5000 .ANG., substantial current is obtained with less than 10 volts. Recent experiments leave no doubt that the charge transport is in the vacuum of the pores.

Abstract: A micro heat pipe, formed in a semiconductor substrate, carries heat from a region of heat flux in the substrate to a region of lower heat flux. The micro heat pipe is formed by cutting a groove into the substrate opposite a site where devices have been formed or are to be formed. Vapor deposited layers are then formed on the substrate to define the micro heat pipe. A fraction of the pipe is filled with a coolant or other working fluid and the pipe is sealed. A micro heat pipe may also be formed by etching a channel down into the substrate, oxidizing the surfaces of the channel, charging the channel with a cooling medium to fill a fraction of the channel and sealing the end of the channel. In operation, the working fluid evaporates in the region of high heat flux and condenses in the region of lower heat flux resulting in the transfer or redistribution of the fluid's heat of vaporization.

Abstract: A gated resonant tunneling diode has a semiconductor mesa formed on a semiconductor substrate, a tunneling barrier layer between the mesa and the substrate, and a gate layered over the substrate about the mesa and aligned in close proximity to the tunneling barrier layer. A control voltage on the gate laterally constricts a potential well in the tunneling barrier to control the electrical size of a channel within which tunnelling occurs across the tunneling barrier layer. Preferably the gate and the tunneling layer are disposed at the base of the mesa, and the gate makes a rectifying Schottky junction in connection with the tunneling barrier layer. The device is constructed using an anisotropic etch to form the mesa with an undercut wall and a top portion overhanging the undercut wall, and a nonconformal deposition of gate material to align the gate with the top portion of the mesa.