Abstract: A method, apparatus, and computer instructions for managing a set of processors. A call from an operating system is received. The call indicates that a selected processor in the set of processors is unneeded for a period of time. In response to receiving this call, the operation of the selected processor is altered to reduce power usage during the period of time.

Abstract: A method is provided for loading device drivers in a computer system having a set of devices, when Open Firmware is implemented to boot the system. A set of stub device drivers are initially created, one for each device attached to the computer system. A stub driver comprises a reduced form of the complete driver for its corresponding device, wherein each stub driver is capable of providing device tree properties of its corresponding device. The method further comprises loading each of the stub drivers into the system, to respectively create device tree properties for the devices in response to a specified implementation of the Open Firmware. The loaded stub driver of a particular device is used to trigger loading of the complete driver for the particular device, only when the particular device is required for use by the specified Firmware implementation.

Abstract: A method and apparatus to automatically initialize the operational settings of an integrated circuit according to the requirements of the system in which the integrated circuit is being used.

Abstract: A method, apparatus, and computer program product are disclosed in a data processing system for dynamically modifying operating parameters of processing units included in a processor core that is included in a central processing unit. A next context to be processed is received. The next context includes an identification of all first specialized processing units that will be needed to process the next context. All second specialized processing units are identified that were needed to process a previous context that has just finished being processed by the processor core. A comparison between the first units and the second units is made to generate an identification of all third units that were needed for the previous context but that are not needed for the next context and all fourth units that were not needed for the previous context but that are needed for the next context.

Abstract: To emulate an interrupt architecture in a data processing system, interrupt emulation code receives from an operating system a first call requesting access to a first resource in a first interrupt architecture. In response to receipt by the interrupt emulation code of the first call, the interrupt emulation code maps the first resource to a second resource in interrupt hardware of the data processing system. The mapping operation includes determining an identifier of the second resource in a different second interrupt architecture. The interrupt emulation code then initiates access to the second resource implemented by the interrupt hardware.

Abstract: A mechanism for determining the maximum speed at which a PCI bus should be set. The mechanism uses a card presence pin provided for in the PCI specification to detect the number of devices residing on the PCI bus. The mechanism then sets the PCI bus speed to the highest speed possible for the actual number of devices on the PCI bus and not the maximum number of devices the PCI bus can handle.

Abstract: Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.

Abstract: A method, apparatus, and computer instructions for managing a set of processors. A call from an operating system is received. The call indicates that a selected processor in the set of processors is unneeded for a period of time. In response to receiving this call, the operation of the selected processor is altered to reduce power usage during the period of time.

Abstract: A method, apparatus, and computer instructions for managing a set of devices in the data processing system. An alert is received through an external alert mechanism. The alert is at least one of a power alert and a thermal alert. In response to the alert, operation of a selected device within the set of devices is altered such that at least one of power usage and generation of heat by the selected device is reduced or restored to normal operation. The mapping of the reduced physical resources to logical resources is performed with no operating system intervention.