Patents by Inventor Mark Hayashida

Mark Hayashida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11301373
    Abstract: A storage device includes a nonvolatile memory including a plurality of physical blocks, a communication interface connectable to a host, and a controller. The controller is configured to generate metadata of host data, which include user data and metadata of the user data, and write, in a physical block of the nonvolatile memory, the metadata of the host data, the metadata of the user data, and the user data continuously in this order, when the host data are received through the communication interface in association with a write command.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: April 12, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Daisuke Hashimoto, Shigehiro Asano, Katsuhiko Ueki, Mark Hayashida
  • Publication number: 20210081315
    Abstract: A storage device includes a nonvolatile memory including a plurality of physical blocks, a communication interface connectable to a host, and a controller. The controller is configured to generate metadata of host data, which include user data and metadata of the user data, and write, in a physical block of the nonvolatile memory, the metadata of the host data, the metadata of the user data, and the user data continuously in this order, when the host data are received through the communication interface in association with a write command.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 18, 2021
    Inventors: Daisuke HASHIMOTO, Shigehiro ASANO, Katsuhiko UEKI, Mark HAYASHIDA
  • Patent number: 10866912
    Abstract: In one embodiment, a heterogeneous integrated solid state drive includes a plurality of solid state memory devices including at least one solid state memory device of a first type and at least one solid state memory device of a second type, a controller coupled to each of the plurality of solid state memory devices and an interface coupled to the controller. The controller is configured to receive at least one user-defined memory parameter and to create at least one namespace satisfying the at least one user-defined memory parameter in at least one of the plurality of solid state memory devices. In one embodiment, the at least one user-defined memory parameter is one of a group consisting of a capacity, a quality of service level, an assured number of I/O operations per second, a bandwidth, a latency, and an endurance.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: December 15, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Mark Hayashida, Yaron Klein
  • Patent number: 10853233
    Abstract: A storage device includes a nonvolatile memory including a plurality of physical blocks, a communication interface connectable to a host, and a controller. The controller is configured to generate metadata of host data, which include user data and metadata of the user data, and write, in a physical block of the nonvolatile memory, the metadata of the host data, the metadata of the user data, and the user data continuously in this order, when the host data are received through the communication interface in association with a write command.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: December 1, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke Hashimoto, Shigehiro Asano, Katsuhiko Ueki, Mark Hayashida
  • Publication number: 20180260135
    Abstract: In one embodiment, a heterogeneous integrated solid state drive includes a plurality of solid state memory devices including at least one solid state memory device of a first type and at least one solid state memory device of a second type, a controller coupled to each of the plurality of solid state memory devices and an interface coupled to the controller. The controller is configured to receive at least one user-defined memory parameter and to create at least one namespace satisfying the at least one user-defined memory parameter in at least one of the plurality of solid state memory devices. In one embodiment, the at least one user-defined memory parameter is one of a group consisting of a capacity, a quality of service level, an assured number of I/O operations per second, a bandwidth, a latency, and an endurance.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventors: Mark Hayashida, Yaron Klein