Patents by Inventor Mark Hlad

Mark Hlad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10856424
    Abstract: A method that includes electroplating both sides of a core and the through hole of a core with a conductive material to cover both sides of the core with the conductive material and to form a conductive bridge in the through hole, wherein the core has a thickness greater than 200 microns; etching the conductive material that covers both sides of the core to reduce the thickness of the conductive material to about 1 micron; applying a film resist to the core; exposing and developing the resist film to form patterns on the conductive material on both sides of the core; and electroplating additional conductive material on the (i) conductive material on both sides of the core (ii) conductive material within the through hole; and (iii) conductive bridge to fill the through hole with conductive material without any voids and to form conductive patterns on both sides of the core.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: December 1, 2020
    Assignee: Intel Corporation
    Inventors: Sri Ranga Sai Boyapati, Amanda E. Schuckman, Sashi S. Kandanur, Srinivas Pietambaram, Mark Hlad, Kristof Darmawikarta
  • Patent number: 10734282
    Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: August 4, 2020
    Assignee: Intel Corporation
    Inventors: Harold Ryan Chase, Mihir K Roy, Mathew J Manusharow, Mark Hlad
  • Publication number: 20190027405
    Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 24, 2019
    Inventors: Harold Ryan Chase, Mihir K. Roy, Mathew J. Manusharow, Mark Hlad
  • Patent number: 10121701
    Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventors: Harold Ryan Chase, Mihir K. Roy, Mathew J. Manusharow, Mark Hlad
  • Publication number: 20180288885
    Abstract: A method that includes electroplating both sides of a core and the through hole of a core with a conductive material to cover both sides of the core with the conductive material and to form a conductive bridge in the through hole, wherein the core has a thickness greater than 200 microns; etching the conductive material that covers both sides of the core to reduce the thickness of the conductive material to about 1 micron; applying a film resist to the core; exposing and developing the resist film to form patterns on the conductive material on both sides of the core; and electroplating additional conductive material on the (i) conductive material on both sides of the core (ii) conductive material within the through hole; and (iii) conductive bridge to fill the through hole with conductive material without any voids and to form conductive patterns on both sides of the core.
    Type: Application
    Filed: September 25, 2015
    Publication date: October 4, 2018
    Inventors: Sri Ranga Sai Boyapati, Amanda E. Schuckman, Sashi S. Kandanur, Srinivas Pietambaram, Mark Hlad, Kristof Darmawikarta
  • Publication number: 20160336223
    Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.
    Type: Application
    Filed: July 26, 2016
    Publication date: November 17, 2016
    Inventors: Harold Ryan Chase, Mihir K. Roy, Mathew J. Manusharow, Mark Hlad
  • Patent number: 9406587
    Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: August 2, 2016
    Assignee: Intel Corporation
    Inventors: Harold Ryan Chase, Mihir K. Roy, Mathew J. Manusharow, Mark Hlad
  • Publication number: 20130341772
    Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.
    Type: Application
    Filed: June 26, 2012
    Publication date: December 26, 2013
    Inventors: Harold Ryan Chase, Mihir K. Rov, Mathew J. Manusharow, Mark Hlad
  • Patent number: 8353101
    Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: January 15, 2013
    Assignee: Intel Corporation
    Inventors: Charan Gurumurthy, Sanka Ganesan, Chandrashekar Ramaswamy, Mark Hlad
  • Publication number: 20110108427
    Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.
    Type: Application
    Filed: January 18, 2011
    Publication date: May 12, 2011
    Inventors: Charan Gurumurthy, Sanka Ganesan, Chandrashekar Ramaswamy, Mark Hlad
  • Patent number: 7888784
    Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: February 15, 2011
    Assignee: Intel Corporation
    Inventors: Charan Gurumurthy, Sanka Ganesan, Chandrashekhar Ramaswamy, Mark Hlad
  • Publication number: 20100078826
    Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Inventors: Charan Gurumurthy, Sanka Ganesan, Chandrashekhar Ramaswamy, Mark Hlad