Abstract: A phenol compound comprises a phenyl group, a hydroxy group directly bonded to the phenyl group, and at least one polymeric substituent bound to the phenyl group. The polymeric substituent comprises three or more monomers units. A method for producing a polyurethane polymer comprises the steps of (a) providing a polyol; (b) providing a polyisocyanate compound; (c) providing the phenol compound described above; (d) combining the polyol, the polyisocyanate compound, and the phenol compound to produce a reaction mixture; and (e) allowing the polyol and the polyisocyanate compound to react to produce a polyurethane polymer.

Abstract: In one example, a non-volatile memory system, comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain or each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to an erase gate line of the array during an operation, wherein the adaptive bias decoder adjusts the voltage provided to the erase gate line in response to changes in a voltage of the source line.

Abstract: In one example, a non-volatile memory system, comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain or each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to the source line of the array during operation.

Abstract: In one example, a non-volatile memory system comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain of each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to a word line of the array during an operation, wherein the adaptive bias decoder adjusts the voltage provided to the word line in response to changes in a voltage of the source line.

Abstract: Optical lenses and associated luminaire are described herein. In one aspect, a lens comprises a light receiving side comprising grooves for receiving light emitting diodes, the grooves defined by a central refractive region and walls comprising total internal reflection faces; and a light extraction side opposite the light receiving side, the light extraction side comprising refractive extraction surfaces, total internal reflection extraction surfaces, or combinations thereof. In some embodiments, luminaire comprises an array of light emitting diodes; and the lens positioned over the array of light emitting diodes.

Abstract: A cooling system includes a primary heat sink including a primary top base plate, a primary bottom base plate and a primary fin pack including a plurality of fins, where the primary fin pack is disposed between the primary top base plate and the primary bottom base plate. The cooling system further includes secondary heat sink including a secondary top base plate, a secondary bottom base plate and a secondary fin pack including a plurality of fins, where the secondary fin pack is disposed between the secondary top base plate and the secondary bottom base plate. A heat pipe extends between the primary top base plate and the primary bottom base plate, where the heat pipe further extends from the primary heat sink and couples with the secondary heat sink.

Abstract: A cooling system includes a primary heat sink including a primary top base plate, a primary bottom base plate and a primary fin pack including a plurality of fins, where the primary fin pack is disposed between the primary top base plate and the primary bottom base plate. The cooling system further includes secondary heat sink including a secondary top base plate, a secondary bottom base plate and a secondary fin pack including a plurality of fins, where the secondary fin pack is disposed between the secondary top base plate and the secondary bottom base plate. A heat pipe extends between the primary top base plate and the primary bottom base plate, where the heat pipe further extends from the primary heat sink and couples with the secondary heat sink.

Abstract: An apparatus includes a housing, one or more storage drives, one or more fans, and one or more acoustic barriers. The housing includes a bottom side bounded by a front side, a back side, a first side, and a second side opposite the first side. The housing may further include a top cover removably attached to the housing. The storage drives may be disposed within the housing at a first location. The fans may be disposed within the housing at a second location spaced from the first location. The fans may generate a flow of air through the housing, while simultaneously generating sound waves that travel throughout the housing. The acoustic barriers may be disposed between the storage drives and the fans, and configured to attenuate the sounds waves prior to the sound waves reaching the storage drives in order to reduce the throughput performance degradation of the drives.

Abstract: The present invention provides a checking alignment method for a printed circuit board (PCB). The present method comprises following steps. First, a substrate and a PCB are provided. Then, a tape automated bonding process is performed to attach the substrate and the PCB by using a plurality of tapes. Next, a welding process is performed to connect original dummy lines on the substrate, those tapes, and the PCB to make a testing circuit for checking alignment. The present invention uses visible processes and equipment to check alignment. The present invention can judge more than two wrong alignment positions and quickly find each of wrong positions.

Abstract: The present invention provides a checking alignment method for a printed circuit board (PCB). The present method comprises following steps. First, a substrate and a PCB are provided. Then, a tape automated bonding process is performed to attach the substrate and the PCB by using a plurality of tapes. Next, a welding process is performed to connect original dummy lines on the substrate, those tapes, and the PCB to make a testing circuit for checking alignment. The present invention uses visible processes and equipment to check alignment. The present invention can judge more than two wrong alignment positions and quickly find each of wrong positions.