Patents by Inventor Mark I. Arcedera

Mark I. Arcedera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optimizing memory operations in an electronic storage device
    Patent number: 8010740
    Abstract: To optimize memory operations, a mapping table may be used that includes: logical fields representing a plurality of LBA sets, including first and second logical fields for representing respectively first and second LBA sets, the first and second LBA sets each representing a consecutive LBA set; PBA fields representing PBAs, including a first PBA disposed for representing a first access parameter set and a second PBA disposed for representing a second access parameter set, each PBA associated with a physical memory location in a memory store, and these logical fields and PBA fields disposed to associate the first and second LBA sets with the first and second PBAs; and, upon receiving an I/O transaction request associated with the first and second LBA sets, the mapping table causes optimized memory operations to be performed on memory locations respectively associated with the first and second PBAs.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: August 30, 2011
    Assignee: BiTMICRO Networks, Inc.
    Inventors: Mark I. Arcedera, Ritchie Babaylan, Reyjan Lanuza