Patents by Inventor Mark J. Christopherson

Mark J. Christopherson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for correcting a multilevel cell memory by using interleaving
    Patent number: 5754566
    Abstract: A method and apparatus for correcting errors in a multilevel cell memory is described. A multilevel cell memory is comprised of multilevel cells, each capable of storing two or more bits of data. A plurality of data bits is received by the multilevel cell memory. The plurality of data bits are sorted into two or more data words. Error correction codes are generated for each of the two or more data words. A memory element bit pattern is formed that comprises one bit from each of the two or more data words. A charge state associated with the memory element bit pattern is stored in one of the multilevel cells.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: May 19, 1998
    Assignee: Intel Corporation
    Inventors: Mark J. Christopherson, Mark E. Bauer