Abstract: A proposed implementation of this present subject matter utilizes a data collection and processing unit and sensors to monitor one or more conditions which can cause damage to a pump. These conditions include differential pressure across the pump, pump flow rate, and the pump rotational speed (RPM). Pump operating curves are analyzed to develop equations indicative of minimum and maximum allowable head for efficient operation within mechanical operation limits of the pump. The equations are used to set a processor for analyzing data inputs. The processor utilizes sensor inputs from the pump, including input and output pressure differential, flow, and pump speed. These values are compared to stored data or may be inserted into an equation to provide a calculated parameter indicative of operation in or out of pump operating limits. Responsive circuits inform users of alarm conditions.

Abstract: A single software defined radio handles both AIS and ORBCOMM communications. A software defined software defined radio detects incoming signals and resolves whether they are AIS or ORBCOMM signals. The signal is directed to a processor in which an algorithm is selected in correspondence with the type of signal which has been recognized. The algorithm extracts intelligence when receiving or encodes intelligence when transmitting. The present software defined radio switches from the ORBCOMM mode to the AIS mode automatically as required in order to maintain a mandatory duty cycle in both the AIS and ORBCOMM modes as defined by regulations, and provides user configurable communications capabilities over both the AIS and ORBCOMM networks in a low-cost, integrated, hardware implementation.

Abstract: A proposed implementation of this present subject matter utilizes a data collection and processing unit and sensors to monitor one or more conditions which can cause damage to a pump. These conditions include differential pressure across the pump, pump flow rate, and the pump rotational speed (RPM). Pump operating curves are analyzed to develop equations indicative of minimum and maximum allowable head for efficient operation within mechanical operation limits of the pump. The equations are used to set a processor for analyzing data inputs. The processor utilizes sensor inputs from the pump, including input and output pressure differential, flow, and pump speed. These values are compared to stored data or may be inserted into an equation to provide a calculated parameter indicative of operation in or out of pump operating limits. Responsive circuits inform users of alarm conditions.

Abstract: A single software defined radio handles both AIS and ORBCOMM communications. A software defined software defined radio detects incoming signals and resolves whether they are AIS or ORBCOMM signals. The signal is directed to a processor in which an algorithm is selected in correspondence with the type of signal which has been recognized. The algorithm extracts intelligence when receiving or encodes intelligence when transmitting.

Abstract: An under voltage lockout {overscore (RESET)} circuit is connected to the {overscore (RESET)} terminal of a EEPROM. The EEPROM is used in a system which may include a computer or processor and which may be used in space. The under voltage lockout {overscore (RESET)} circuit maybe an under voltage lockout circuit used on a LinFinity SG1526/B or a Unitrode UC1526 regulating pulse width modulator which maintain the {overscore (RESET)} voltage low at all values of power supply voltage source voltage less than a predetermined level. In one embodiment the under voltage lockout {overscore (RESET)} circuit output voltage does not have a “floating voltage” which rises to a level higher than its value when a comparator initially senses that a power supply voltage source voltage is less than the predetermined amount. This is a flat {overscore (RESET)} characteristic under voltage lockout.

Abstract: An under voltage lockout {overscore (RESET)} circuit is connected to the {overscore (RESET)} terminal of a EEPROM. The EEPROM is used in a system which may include a computer or processor and which may be used in space. The under voltage lockout {overscore (RESET)} circuit maybe an under voltage lockout circuit used on a LinFinity SG1526/B or a Unitrode UC1526 regulating pulse width modulator which maintain the {overscore (RESET)} voltage low at all values of power supply voltage source voltage less than a predetermined level. In one embodiment the under voltage lockout {overscore (RESET)} circuit output voltage does not have a “floating voltage” which rises to a level higher than its value when a comparator initially senses that a power supply voltage source voltage is less than the predetermined amount. This is a flat {overscore (RESET)} characteristic under voltage lockout.

Abstract: An under voltage lockout {overscore (RESET)} circuit is connected to the {overscore (RESET)} terminal of a EEPROM. The EEPROM is used in a system which may include a computer or processor and which may be used in space. The under voltage lockout {overscore (RESET)} circuit maybe an under voltage lockout circuit used on a LinFinity SG1526/B or a Unitrode UC1526 regulating pulse width modulator which maintain the {overscore (RESET)} voltage low at all values of power supply voltage source voltage less than a predetermined level. In one embodiment the under voltage lockout {overscore (RESET)} circuit output voltage does not have a “floating voltage” which rises to a level higher than its value when a comparator initially senses that a power supply voltage source voltage is less than the predetermined amount. This is a flat {overscore (RESET)} characteristic under voltage lockout.

Abstract: A power transistor switched power supply connecting a power source to a capacitive load, including a circuit and method for limiting the inrush surge current through the power transistor. The control gate of a junction field effect transistor (JFET) is coupled between the conductive path of the power transistor and the load to sense voltage drop across the power transistor. The conductive controlled path of the JFET is connected to control the impedance of the power transistor. The JFET shunts some of the power transistor control terminal current during the on transition allowing the power transistor to only turn partially on for a period of time, thus limiting the current through the power transistor from the power source to the load. Because the inrush surge current is limited, the accompanying transient power source voltage drop is reduced with less impact to other circuits connected to the power source.

Abstract: A redundant power supply with a number of loads is coupled to each half of the redundant supply by a respectively different MOSFET switch, with logic gates coupling control signals to the MOSFET switches. The control signal is coupled as one input to the logic gate and the output of the logic gate is connected to the MOSFET switch. The other input of the logic gates for a particular power supply is the output of an overvoltage detection circuit whose output is coupled as an input to all the gates for that power supply. The output of the gates opens the MOSFET switches in response to detection of an overvoltage condition.

Abstract: A MOSFET switched, redundant power supply has a back-to-back MOSFET switch connecting respectively each power supply to a single load. Each power supply has a positive and negative gate voltage source. In a specific N-channel MOSFET embodiment, the positive (i.e. on) bias is coupled to each switch via a radiation hardened, redundant analogue switch capable of being driven by, for example, a TTL or CMOS microprocessor signal. The negative (i.e. off) bias is coupled to each via a redundant diode pair. In addition, the gates of the back-to-back MOSFET switch for one power source are also connected to the negative bias of the other power source. In this way the MOSFET switch for a failed power supply will be maintained in an off state by the negative bias provided by the redundant supply.