Abstract: The invention is in the field of additive manufacturing. According to a first aspect of the invention, there is provided an additive manufacturing process for producing a printed article, comprising the step of sintering a powder composition comprising a thermoplastic elastomer, wherein the powder composition has a melting onset temperature Tm,onset and a melting peak temperature Tm,peak, which are measured according to ISO 11357-1/3 (2009), wherein Tm,peak minus Tm,onset is 30° C. or less; and wherein a test article printed from the powder composition has a rebound resilience of 50% or more, measured according to DIN 53512.

Abstract: A multiprocessor arrangement is disclosed, in which a plurality of processors are able to communicate with each other by means of a plurality of time-sliced memory blocks. At least one, and up to all, of the processors may be able to access more than one time-sliced memories. A mesh arrangement of such processors and memories is disclosed, which may be a partial or complete mesh. The mesh may to two-dimensional, or higher dimensional. A method of communication between processors in a multiprocessor arrangement is also disclosed, in which one or more processors are able to each access a plurality of memories, in each case by time-slicing.

Abstract: A device including a first integrated circuit (IC), a second IC configured to provide instructions to the first IC based on received data, wherein the first IC is a high-voltage IC and the second IC is a low-voltage IC, and a communication interface between the first and second ICs including a data bus of parallel data lines. The second IC is configured to select, based on the received data, one of a plurality of different communication modes for providing the instructions to the first IC via the communication interface, wherein each mode is defined by a quantity of address data and a quantity of configuration data used to provide the instructions to the first IC.

Abstract: A device including a first integrated circuit (IC), a second IC configured to provide instructions to the first IC based on received data, wherein the first IC is a high-voltage IC and the second IC is a low-voltage IC, and a communication interface between the first and second ICs including a data bus of parallel data lines. The second IC is configured to select, based on the received data, one of a plurality of different communication modes for providing the instructions to the first IC via the communication interface, wherein each mode is defined by a quantity of address data and a quantity of configuration data used to provide the instructions to the first IC.

Abstract: A device including a first integrated circuit (IC), a second IC configured to provide instructions to the first IC based on received data, wherein the first IC is a high-voltage IC and the second IC is a low-voltage IC, and a communication interface between the first and second ICs including a data bus of parallel data lines. The second IC is configured to select, based on the received data, one of a plurality of different communication modes for providing the instructions to the first IC via the communication interface, wherein each mode is defined by a quantity of address data and a quantity of configuration data used to provide the instructions to the first IC.

Abstract: A device including a first integrated circuit (IC), a second IC configured to provide instructions to the first IC based on received data, wherein the first IC is a high-voltage IC and the second IC is a low-voltage IC, and a communication interface between the first and second ICs including a data bus of parallel data lines. The second IC is configured to select, based on the received data, one of a plurality of different communication modes for providing the instructions to the first IC via the communication interface, wherein each mode is defined by a quantity of address data and a quantity of configuration data used to provide the instructions to the first IC.

Abstract: A multiprocessor arrangement is disclosed, in which a plurality of processors are able to communicate with each other by means of a plurality of time-sliced memory blocks. At least one, and up to all, of the processors may be able to access more than one time-sliced memories. A mesh arrangement of such processors and memories is disclosed, which may be a partial or complete mesh. The mesh may to two-dimensional, or higher dimensional. A method of communication between processors in a multiprocessor arrangement is also disclosed, in which one or more processors are able to each access a plurality of memories, in each case by time-slicing.

Abstract: A latency control mechanism for a communication system provides a known constant end-to-end delay between an audio source and one or more end node destinations, even in the case where different paths are used to reach the end nodes. A very low jitter time on the end-to-end latency is obtained, and the latency is controllable within a given range in dependence on the constraints imposed by the implementation. A block RX DPLL and latency control unit adjusts the reading moment and position from the RX buffer so that a delay between the time stamp taken at the source side by the transmitter time stamp unit, and the time stamp taken at the receiver side by receiver time stamp unit is constant and equal to a given value.

Abstract: A latency control mechanism for a communication system provides a known constant end-to-end delay between an audio source and one or more end node destinations, even in the case where different paths are used to reach the end nodes. A very low jitter time on the end-to-end latency is obtained, and the latency is controllable within a given range in dependence on the constraints imposed by the implementation. A block RX DPLL and latency control unit adjusts the reading moment and position from the RX buffer so that a delay between the time stamp taken at the source side by the transmitter time stamp unit, and the time stamp taken at the receiver side by receiver time stamp unit is constant and equal to a given value.

Abstract: A system for determining the work time of a work tool is disclosed. The system has a work tool. The system also has a work tool movement sensor adapted to produce a signal indicative of a movement of the work tool. The system further has a controller adapted to produce a signal indicative of a work time of the work tool as a function of the movement of the work tool.

Abstract: A separating device for coolants or lubricants, containing chips, is described. This is provided with a supply line (11), a container (10) as well as a pump (20), which is connected with the container (10). The pressure side of the pump is connected with a discharge line (28). The pump, in particular, is an unchokable pump. A device (13), for comminuting the chips supplied, is disposed in the container (10).

Abstract: A pumping station for pumping a cooling and lubricating fluid containing particulate matter such as machining chips has a compact structure with a relatively low total structural height, while still assuring that the chips are conveyed with the fluid to the pump suction inlet, without settling-out or accumulating in the apparatus. The pumping station (1) includes a collecting container (5) with at least one pump (6) arranged therein, a chip breaker (7) and a supply conduit arrangement. The supply conduit arrangement includes a supply line (2) through which the cooling and lubricating fluid containing the machining chips is received from a machining tool or transfer station. Furthermore, two branch lines (3) and (4) are interposed and connected between the supply line (2) and the collecting container (5). A first branch line (3) conveys the fluid, from which the chips have been removed, with a slight downward slope toward the collecting container (5).