Abstract: An apparatus and method for complex matrix multiplication. For example, one embodiment of a processor comprises: a decoder to decode a first complex matrix multiplication instruction; execution circuitry to execute the first complex matrix multiplication instruction, the execution circuitry comprising parallel multiplication circuitry to multiply real values from the first plurality of real and imaginary values with corresponding real values from the second plurality of real and imaginary values to generate a first plurality of real products, to multiply imaginary values from the first plurality of real and imaginary values with corresponding imaginary values from the second plurality of real and imaginary values to generate a second plurality of real products; and addition/subtraction circuitry to subtract each real product in the second plurality of real products from a corresponding real product in the first plurality of real products to produce a corresponding real value in the result matrix.

Abstract: An apparatus and method for complex matrix conjugation and multiplication.

Abstract: An apparatus and method for complex matrix transpose and multiply.

Abstract: An apparatus and method for complex matrix conjugation.

Abstract: A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.

Abstract: A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.

Abstract: A cache memory system for use with an external cache system comprising at least one data array includes one or more cache data arrays and corresponding cache directory arrays. The cache memory system operates in one of at least two modes of operation. In a first mode of operation, the cache data arrays store data relating to directory information stored in the corresponding cache directory arrays. In a second mode of operation, at least a portion of the cache data arrays stores directory information corresponding to the at least one data array of the external cache system.