Patents by Inventor Mark Jonathan Lewis
Mark Jonathan Lewis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11960921Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: GrantFiled: May 11, 2023Date of Patent: April 16, 2024Assignee: Altera CorporationInventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Publication number: 20230325230Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: ApplicationFiled: May 11, 2023Publication date: October 12, 2023Inventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Patent number: 11687358Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: GrantFiled: March 26, 2021Date of Patent: June 27, 2023Assignee: Altera CorporationInventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Patent number: 11675613Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: GrantFiled: September 17, 2020Date of Patent: June 13, 2023Assignee: Altera CorporationInventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Publication number: 20210216354Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: ApplicationFiled: March 26, 2021Publication date: July 15, 2021Inventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Patent number: 10963291Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: GrantFiled: November 13, 2019Date of Patent: March 30, 2021Assignee: Altera CorporationInventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Publication number: 20210004256Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: ApplicationFiled: September 17, 2020Publication date: January 7, 2021Inventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Patent number: 10782995Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: GrantFiled: November 13, 2018Date of Patent: September 22, 2020Assignee: Altera CorporationInventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Publication number: 20200183727Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: ApplicationFiled: November 13, 2019Publication date: June 11, 2020Inventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Patent number: 10489178Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: GrantFiled: April 28, 2015Date of Patent: November 26, 2019Assignee: Altera CorporationInventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Publication number: 20190079794Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: ApplicationFiled: November 13, 2018Publication date: March 14, 2019Inventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Patent number: 10133594Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: GrantFiled: February 6, 2017Date of Patent: November 20, 2018Assignee: Altera CorporationInventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Patent number: 9588791Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: GrantFiled: April 27, 2015Date of Patent: March 7, 2017Assignee: Altera CorporationInventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Publication number: 20160321094Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.Type: ApplicationFiled: April 28, 2015Publication date: November 3, 2016Inventors: Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis, Jiefan Zhang
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Publication number: 20160314007Abstract: Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.Type: ApplicationFiled: April 27, 2015Publication date: October 27, 2016Inventors: Jiefan Zhang, Abdel Hafiz Rabi, Allen Chen, Mark Jonathan Lewis
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Patent number: 9378043Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The traffic at the NFV platform may be controlled by a distributed Quality of Service (QoS) manager. The distributed QoS manager may include multiple QoS modules each of which serves to perform priority queuing independently for its associated component or interface. For example, the NFV platform may include a first QoS module for arbitrating among multiple virtual machines, a second QoS module for performing priority queuing for data packets received at an external network port, a third QoS module for arbitrating among memory accesses at a coprocessor external memory interface, fourth QoS module for arbitrating accesses among multiple hardware acceleration slices, etc.Type: GrantFiled: May 28, 2015Date of Patent: June 28, 2016Assignee: Altera CorporationInventors: Jiefan Zhang, Alexander Kugel, Allen Chen, Mark Jonathan Lewis, Abdel Hafiz Rabi
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Patent number: 9313132Abstract: Systems and methods are provided herein for implementing an OAM co-processor that is connected to a switching device. The ingress engine may determine whether the received input data comprises OAM information, and the ingress engine may selectively process or forward the input data to the switching device. If the ingress engine determines that the input data does comprise OAM information, the ingress engine may intercept the input data and process it at the OAM co-processor. This may cause OAM information to be processed utilizing the latest known OAM technology, rather than the potentially dated OAM processing technology of the switching device.Type: GrantFiled: May 28, 2014Date of Patent: April 12, 2016Assignee: Altera CorporationInventors: Alexander Kugel, Mark Jonathan Lewis