Patents by Inventor Mark Juang

Mark Juang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • In-situ formed capping layer in MTJ devices
    Patent number: 8143683
    Abstract: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: March 27, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Hung Wang, Yu-Jen Wang, Mark Juang, Chia-Shiung Tsai
  • In-Situ Formed Capping Layer in MTJ Devices
    Publication number: 20100193891
    Abstract: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
    Type: Application
    Filed: April 8, 2010
    Publication date: August 5, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Hung Wang, Yu-Jen Wang, Mark Juang, Chia-Shiung Tsai
  • In-situ formed capping layer in MTJ devices
    Patent number: 7723128
    Abstract: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
    Type: Grant
    Filed: February 18, 2008
    Date of Patent: May 25, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Hung Wang, Yu-Jen Wang, Mark Juang, Chia-Shiung Tsai
  • In-Situ Formed Capping Layer in MTJ Devices
    Publication number: 20090209050
    Abstract: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
    Type: Application
    Filed: February 18, 2008
    Publication date: August 20, 2009
    Inventors: Yung-Hung Wang, Yu-Jen Wang, Mark Juang, Chia-Shiung Tsai