Abstract: A method is described that comprises suspending a currently executing thread at a periodic time interval, calculating a next time slot during which the currently executing thread is to resume execution, appending the suspended thread to a queue of threads scheduled for execution at the calculated time slot, and updating an index value of a pointer index to a next sequential non-empty time slot, where the pointer index references time slots within an array of time slots, and where each of the plurality of time slots corresponds to a timeslice during which CPU resources are allocated to a particular thread. The method further comprises removing any contents of the indexed non-empty time slot and appending the removed contents to an array of threads requesting immediate CPU resource allocation and activating the thread at the top of the array of threads requesting immediate CPU resource allocation as a currently running thread.

Abstract: An operating system is provided wherein a plurality of objects are established and registered in response to requests from hardware or software associated with the computer system. The objects include at least one type, at least one attribute, and a handle. The plurality of objects are then manipulated to effect processing and exchange of information.

Abstract: A method is described that comprises suspending a currently executing thread at a periodic time interval, calculating a next time slot during which the currently executing thread is to resume execution, appending the suspended thread to a queue of threads scheduled for execution at the calculated time slot, and updating an index value of a pointer index to a next sequential non-empty time slot, where the pointer index references time slots within an array of time slots, and where each of the plurality of time slots corresponds to a timeslice during which CPU resources are allocated to a particular thread. The method further comprises removing any contents of the indexed non-empty time slot and appending the removed contents to an array of threads requesting immediate CPU resource allocation and activating the thread at the top of the array of threads requesting immediate CPU resource allocation as a currently running thread.

Abstract: A circular array structure is maintained having multiple time slots, where each time slot corresponds to a timeslice during which CPU resources are allocated to a particular thread. The time slots in the circular array include a queue of threads scheduled for execution during that time slot. A pointer index and an array of threads requesting immediate CPU resource allocation are maintained. A currently executing thread is suspended, and a next time slot during which the currently executing thread should resume execution is calculated. The suspended currently executing thread is appended to the queue of threads scheduled for execution at the calculated time slot. The pointer index is undated to point to the identified next sequential non-empty time slot. Any contents of the indexed time slot is appended to the array of threads requesting immediate CPU resource allocation. The thread at the top of the array is removed and activated.

Abstract: This invention relates to systems and methods for wireless and wired optical data communications, in particular infrared data communications using techniques borrowed ultra wideband (UWB) radio. An optical data communications receiver for receiving data encoded using optical pulse position, the receiver comprising: an optical signal reception device; a reference signal memory for storing a reference channel response signal; and a correlator coupled to said reference signal memory and to said optical signal reception device for correlating a received optical pulse with said stored reference channel response signal to determine said optical pulse position; an output coupled to said correlator to provide pulse position data for said received optical pulse.

Abstract: This invention generally relates to networks of communications devices, in particular ultra wideband (UWB) communications devices. An ultra-wideband (UWB) network comprising a plurality of UWB devices each forming a node of said network, pairs of said UWB devices being configured for communication with one another using one of a plurality of UWB channels, each said UWB device comprising a UWB transceiver for bidirectional communication over one or more of said UWB channels with at least one other of said UWB devices; and a device controller coupled to said UWB transceiver, said controller being configured to determine a said UWB channel for use in establishing a communication link with each other UWB device; whereby said network is configured for automatic construction of a set of communications links between said nodes of said network.

Abstract: This invention generally relates to wired and wireless ultra wideband (UWB) data communications apparatus and methods, and in particular to UWB receiver systems and architectures. An ultra wideband (UWB) receiver system comprising: a receiver front end to receive a UWB signal; an analogue-to-digital converter coupled to said receiver front end to digitize said received UBW signal; and a correlator coupled to said analogue-to-digital converter to correlate said digitized UWB signal with a reference signal.

Abstract: Described herein are ultra wideband (UWB) receiver systems, and applications thereof. Such a UWB receiver includes a receiver front end and a correlator coupled to the receiver front end. The receiver front end is configured to receive a UWB signal having a plurality of multipath components. The correlator is configured to correlate the UWB signal with a reference signal. The UWB signal includes a plurality of pulses, wherein each pulse has a plurality of multipath components. The reference signal also includes a plurality of multipath components of the pulse. The correlator includes at least one correlator module configured to correlate a plurality of the multipath components of the pulse with the reference signal.

Abstract: A system, method and computer-readable medium for providing balanced thread scheduling initially comprise assigning a thread energy level to each of a plurality of system threads. At least one of the plurality of system threads is provided with at least one message, wherein the at least one message is assigned a message energy level lower than the thread energy level for the thread from which the message originated. A message is then passed between a first thread and a second thread wherein the message energy level assigned to the passed message is also passed between the first thread and the second thread and wherein the message energy level is proportionate to a quantifiable amount of CPU resources.

Abstract: A method and system for scheduling threads and timer mechanisms of events in a computer system that includes a central processing unit (CPU), a plurality of input/output (I/O) devices, such devices as storage devices, network interface devices (NIDs) and a memory which is typically used to store various applications or other instructions which, when invoked enable the CPU to perform various tasks the timer structure provides a ring structure and an associated control block is provided. The timer mechanism of the present invention comprises a ring structure that includes an array of ring slots, with the slots relating to pointers for implementing a circular array of LIFO (Last In, First Out) queues generally where each LIFO queue maintains a listing of EventDescriptors that relate to functions which must be performed during the time slot associated with the particular pointer position.

Abstract: A method and system are provided for enabling scheduling thread execution in a computer system. Initially, a circular array structure is maintained having a plurality of time slots therein, wherein each of the plurality of time slots corresponds to a timeslice during which CPU resources are allocated to a particular thread. Next, each of the time slots in the circular array are configured to include a queue of threads scheduled for execution during that time slot. A pointer index is maintained for referencing one time slot in the circular array and whereby advancement through the circular array is provided by advancing the pointer index. An array of threads requesting immediate CPU resource allocation is also maintained. In operation, a currently executing thread is suspended. Next, a next time slot during which the currently executing thread should next resume execution is calculated.

Abstract: A method and system is provided for generating pseudo-random numbers utilizing techniques of both the SHA-1 and DES encryption standards, wherein a pseudo-random number generator is re-keyed periodically using an external input of physical randomness. In accordance with one embodiment of the present invention, a current seed value Sj is loaded from a non-volatile storage. Next, values E, representative of environmental randomness, and C, representative of configuration data are likewise loaded. A new seed value, Sj+1, is generated in accordance with the equation Sj+1=f (Sj; A; C; E), wherein f represents a selected encryption algorithm, and B is a second constant, and wherein Sj is concatenated with A, which is concatenated with C which is concatenated with E. The new seed is then written to the non-volatile storage. Next, a key, K, is generated in accordance with the equation K=f (Sj; B; C; E), wherein B is a second constant.

Abstract: A method and apparatus for scheduling the transmission of cells onto an network, or other packet switching network, is disclosed. The central feature of the scheduling mechanism is a multi-functional timing ring which accommodates both preallocated static scheduling for use with CBR and real-time VBR virtual circuits, and dynamic scheduling for use with ABR, UBR, and non-real time VBR virtual circuits. The timing ring, in which cell transmissions are defined as actions, is processed sequentially in a burst fashion. Static actions are always performed at their allocated time intervals, so fixed transmission intervals can be guaranteed for CBR and real-time VBR traffic. Dynamic actions are moved from the timing ring to a latent queue, which permits dynamic actions to be performed during their scheduled time slot or during the first available time slot thereafter. This mechanism permits ABR and non-real-time VBR traffic contracts to be maintained.