Patents by Inventor Mark Karnacewicz

Mark Karnacewicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Silicon-based high speed optical wiring board
    Patent number: 6862378
    Abstract: An optical wire board which utilizes a silicon substrate as the base for both the optical subassembly and the electrical RF transmitting circuit. An optical fiber is preferably passively aligned to the active optical device mounted on the optical subassembly using a V-groove etched into the silicon (and may include a lens or other optical element positioned between the fiber and the active device). An integrated circuit for coupling the active optical device to external contacts is preferably flip-chip mounted to the silicon substrate upon pads disposed on precisely defined edges around a cavity etched beneath the circuit, the inclusion of the cavity beneath the electrical circuit functioning to minimize the dielectric loading effect of the silicon substrate on the integrated circuit.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: March 1, 2005
    Assignee: TriQuint Technology Holding Co.
    Inventors: Mark Karnacewicz, John William Osenbach, Alexandru Paunescu
  • Silicon-based high speed optical wiring board
    Publication number: 20040081385
    Abstract: An optical wire board which utilizes a silicon substrate as the base for both the optical subassembly and the electrical RF transmitting circuit. An optical fiber is preferably passively aligned to the active optical device mounted on the optical subassembly using a V-groove etched into the silicon (and may include a lens or other optical element positioned between the fiber and the active device). An integrated circuit for coupling the active optical device to external contacts is preferably flip-chip mounted to the silicon substrate upon pads disposed on precisely defined edges around a cavity etched beneath the circuit, the inclusion of the cavity beneath the electrical circuit functioning to minimize the dielectric loading effect of the silicon substrate on the integrated circuit.
    Type: Application
    Filed: October 24, 2002
    Publication date: April 29, 2004
    Inventors: Mark Karnacewicz, John William Osenbach, Alexandru Paunescu