Patents by Inventor Mark Karnowski
Mark Karnowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11750522Abstract: Systems and methods of communicating in a network use rate limiting. Rate limiting units (either receive side or transmit side) can perform rate limiting in response to a) a maximum number of bytes that can be solicited over a first period of time is exceeded, b) a maximum number of bytes that are outstanding over a second period of time is exceeded; or c) a maximum number of commands that are outstanding over a period of time is exceeded as part of CMD_RXRL. The CMD_RXRL can have three components (a) max bytes, b) outstanding bytes, c) outstanding commands. TXRL contains the component of max bytes or maximum number of bytes that can be transmitted over a third period of time to match the speed of a receive link, or any node or link through the network/fabric.Type: GrantFiled: April 19, 2021Date of Patent: September 5, 2023Assignee: Avago Technologies International Sales Pte. LimitedInventors: Kenny Wu, James Winston Smart, Mark Karnowski, Ravi Shenoy, Gregorio Gervasio, Jr., Lalit Chhabra, Chakradhara Raj Yadav Aradhyula
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Publication number: 20220334985Abstract: Systems and methods relate to a bus adapter for a storage network. The bus adaptor includes a context memory comprising a first storage for uncacheable exchange resource indicators (XRI) and a second storage for cacheable XRI. The bus adapter also includes a host backing store unit configured to provide access to the different tier memories present locally or externally in the host memory extension using several caching sub-units and with the capability of an optional pinning operation for the cacheable XRI based upon at least one of input/output phase, first in line up to a limit, a region of a virtual context address associated with the cacheable XRI indicators, a protocol associated with the cacheable XRI, a size of a transaction, or work queue information.Type: ApplicationFiled: April 16, 2021Publication date: October 20, 2022Inventors: Marc Pegolotti, Kenny Wu, Ravi Shenoy, Gregorio Gervasio, JR., Lalit Chhabra, Mark Karnowski, James Winston Smart, Vuong Cao Nguyen
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Publication number: 20220337524Abstract: Systems and methods of communicating in a network use rate limiting. Rate limiting units (either receive side or transmit side) can perform rate limiting in response to a) a maximum number of bytes that can be solicited over a first period of time is exceeded, b) a maximum number of bytes that are outstanding over a second period of time is exceeded; or c) a maximum number of commands that are outstanding over a period of time is exceeded as part of CMD_RXRL. The CMD_RXRL, can have three components (a) max bytes, b) outstanding bytes, c) outstanding commands. TXRL, contains the component of max bytes or maximum number of bytes that can be transmitted over a third period of time to match the speed of a receive link, or any node or link through the network/fabric.Type: ApplicationFiled: April 19, 2021Publication date: October 20, 2022Inventors: Kenny Wu, James Winston Smart, Mark Karnowski, Ravi Shenoy, Gregorio Gervasio, JR., Lalit Chhabra, Chakradhara Raj Yadav Aradhyula
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Patent number: 10996980Abstract: A number of command processing devices, architectures, and methods are described. One example of a command processing device is disclosed to include a classification engine configured to classify input commands, a sequencer in communication with the classification engine, one or more thread managers in communication with the sequencer, and one or more sub-processing engines in communication with each of the one or more thread managers. The sequencer may control staging of work across multiple threads and processing elements within threads. Each of the one or more thread managers are configured to delegate work to different sub-processing engines. Each of the one or more sub-processing engines are configured to perform sub-tasks in connection with completing processing of an input command received at the classification engine based on particular sub-tasks assigned to the one or more sub-processing engines by the one or more thread managers.Type: GrantFiled: April 23, 2018Date of Patent: May 4, 2021Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Lalit Chhabra, Gregorio Gervasio, Jr., Kenny Wu, Mark Karnowski
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Patent number: 10664420Abstract: A system, method, and adaptor that facilitate data transmission are described. One example of the disclosed system facilitates the chip-to-chip transport of header descriptors and payloads. The system may include a source chip, a destination chip, and a set of queues describing buffer memory locations for staging header descriptors and payloads to be transferred from the source chip to the destination chip, where the set of queues are directly accessible to the source chip and to the destination chip.Type: GrantFiled: April 19, 2018Date of Patent: May 26, 2020Assignee: Avago Technologies International Sales Pte. LimitedInventors: Kenny Wu, Mark Karnowski, James Smart, Ravi Shenoy, Lalit Chhabra, Gregorio Gervasio, Jr., Tuong Le, Vuong Nguyen
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Publication number: 20190324926Abstract: A system, method, and adaptor that facilitate data transmission are described. One example of the disclosed system facilitates the chip-to-chip transport of header descriptors and payloads. The system may include a source chip, a destination chip, and a set of queues describing buffer memory locations for staging header descriptors and payloads to be transferred from the source chip to the destination chip, where the set of queues are directly accessible to the source chip and to the destination chip.Type: ApplicationFiled: April 19, 2018Publication date: October 24, 2019Inventors: Kenny Wu, Mark Karnowski, James Smart, Ravi Shenoy, Lalit Chhabra, Gregorio Gervasio, JR., Tuong Le, Vuong Nguyen
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Publication number: 20190324800Abstract: A number of command processing devices, architectures, and methods are described. One example of a command processing device is disclosed to include a classification engine configured to classify input commands, a sequencer in communication with the classification engine, one or more thread managers in communication with the sequencer, and one or more sub-processing engines in communication with each of the one or more thread managers. The sequencer may control staging of work across multiple threads and processing elements within threads. Each of the one or more thread managers are configured to delegate work to different sub-processing engines. Each of the one or more sub-processing engines are configured to perform sub-tasks in connection with completing processing of an input command received at the classification engine based on particular sub-tasks assigned to the one or more sub-processing engines by the one or more thread managers.Type: ApplicationFiled: April 23, 2018Publication date: October 24, 2019Inventors: Lalit Chhabra, Gregorio Gervasio, JR., Kenny Wu, Mark Karnowski
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Publication number: 20070079097Abstract: A single SAN management utility is disclosed that discovers all hosts and HBAs in a SAN, configures the storage switches, creates Logical Units within a storage array, and assigns Logical Units to the hosts in the SAN without requiring the administrator to have a detailed understanding of all of the devices in the SAN or a SAN configuration plan. The SAN management utility may first invoke HBA configuration routines to discover and configure the HBAs in the SAN and determine the hosts in which those HBAs reside. The SAN management utility may then utilize the SAN link to set a new IP address for the storage switch, and then configure the switch over an Ethernet connection. In addition, the SAN management utility may interface with a configuration utility in the storage array through a common storage management specification to create and assign Logical Units in the storage array.Type: ApplicationFiled: September 30, 2005Publication date: April 5, 2007Applicant: Emulex Design & Manufacturing CorporationInventors: Mark Karnowski, John Barnard
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Patent number: 5526424Abstract: An electronic notepad associated with the entry, and storage, dialing of telephone numbers is disclosed. The telephone numbers are entered through a telephone touch pad and is displayed on a liquid crystal display. Attached to a stand alone telephone or a telephone answering device (also know as a TAD), telephone numbers which would otherwise be easily forgotten due to transient presentation are retained by the device for later retrieval or use.Type: GrantFiled: March 31, 1995Date of Patent: June 11, 1996Assignee: Casio PhoneMate, Inc.Inventor: Mark Karnowski
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Patent number: 5313516Abstract: A Telephone Answering Device (TAD) has a message transfer system for notifying the owner that a message has been recorded on the TAD and permitting the owner to hear the message by having the TAD automatically dial a preprogrammed telephone number of a telephone at a second location. The TAD would play back a prerecorded audio message to the person picking up the telephone at the second location advising the person that a message has been recorded on the TAD. The TAD calls the preprogrammed telephone a number of times until the telephone at the second location is answered. If the telephone at the second location is not answered after the predetermined number of tries, the attempt to send the transfer message is discontinued.Type: GrantFiled: May 7, 1992Date of Patent: May 17, 1994Assignee: PhoneMate Inc.Inventors: Eskandar Afshar, Mark Karnowski
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Patent number: 5289529Abstract: An automatic gain controller uses a voltage controlled amplifier coupled to an averaging circuit that feeds back into the amplifier. The averaging circuit supplies a controlling voltage that keeps the amplifier output voltage tending towards a certain reference level. When the amplifier output is generally high, the averaging circuit output is also generally high and the reverse is also true for low signals. For low averaging circuit output voltages corresponding to low intensity signals, amplification of the signal by the amplifier is enhanced or augmented. The result is to boost the signal of low intensity signals significantly, compressing the dynamic range of an incoming signal received from a phone. This reduces the variance of an incoming phone line signal for an analog to digital converter (ADC) in a digital telephone answering device, and the effective dynamic range of the ADC is closer to optimum. A scaling circuit couples the signal from the automatic gain controller to the ADC.Type: GrantFiled: October 4, 1990Date of Patent: February 22, 1994Assignee: PhoneMate, Inc.Inventor: Mark Karnowski
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Patent number: 5163082Abstract: A digital memory used by a digital telephone answering device to record messages, a method by which vacant memory space created by the deletion of a message interlying two saved messages is recovered for future message recording use. Available vacated memory is transferred to the top of memory while saved messages are moved to form a contiguous block in lower memory. The location of messages in the digital memory, and save/delete flag, are stored in an entry table for reference and memory management.Type: GrantFiled: October 4, 1990Date of Patent: November 10, 1992Inventor: Mark Karnowski
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Patent number: 5111500Abstract: A telephone answering machine with a built in telephone that incorporates a mechanism for retrieving messages under a variety of operating conditions has the ability to access messages through the telephone handset to ensure privacy, while not interfering with normal telephone usage. The messages can also be played back through the speaker of the unit.Type: GrantFiled: January 4, 1990Date of Patent: May 5, 1992Assignee: PhoneMate, Inc.Inventors: Eskandar Afshar, Mark Karnowski
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Patent number: 5101426Abstract: A telephone answering device (TAD) detects termination signals (Calling Party Control or CPC signals) on a telephone line by determining which signal is most probably a CPC signal, then comparing suspect signals to the determined signal. A series of memory registers store the value of an initial series of suspected CPC signals when the TAD is initially powered up. The stored values are compared with each other to confirm and validate the CPC signal. Upon finding a sufficiently repeated value, that value is stored and from there on used as the value for the CPC signal. Future signals received that are the same as the determined CPC signal terminate TAD operation.Type: GrantFiled: May 14, 1990Date of Patent: March 31, 1992Inventors: Eskandar Afshar, Mark Karnowski
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Patent number: RE34968Abstract: A telephone answering machine with a built in telephone that incorporates a mechanism for retrieving messages under a variety of operating conditions has the ability to access messages through the telephone handset to ensure privacy, while not interfering with normal telephone usage. The messages can also be played back through the speaker of the unit.Type: GrantFiled: May 25, 1993Date of Patent: June 13, 1995Assignee: PhoneMate, Inc.Inventors: Eskandar Afshar, Mark Karnowski