Patents by Inventor Mark Kellam

Mark Kellam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8847192
    Abstract: In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: September 30, 2014
    Assignees: Adesto Technologies France SARL, Adesto Technologies Corporation
    Inventors: Wei Ti Lee, Chakravarthy Gopalan, Yi Ma, Jeffrey Shields, Philippe Blanchard, John Ross Jameson, Foroozan Sarah Koushan, Janet Wang, Mark Kellam
  • Publication number: 20130062587
    Abstract: In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer.
    Type: Application
    Filed: July 25, 2012
    Publication date: March 14, 2013
    Applicant: ADESTO TECHNOLOGIES CORP.
    Inventors: Wei Ti Lee, Chakravarthy Gopalan, Yi Ma, Jeffrey Shields, Philippe Blanchard, John Ross Jameson, Foroozan Sarah Koushan, Janet Wang, Mark Kellam
  • Patent number: 5907790
    Abstract: Thin layers of aluminum and palladium are deposited and annealed to produce aluminum-palladium alloy. The surface of the alloy is exposed and treated with an aluminum enchant to produce a catalytic surface. The catalytic surface is used for electroless plating of nickel, providing excellent plating uniformity and adhesion, as well as a reduced plating induction time. Several variants of the basic method are shown.
    Type: Grant
    Filed: August 29, 1996
    Date of Patent: May 25, 1999
    Assignee: Astarix Inc.
    Inventor: Mark Kellam
  • Patent number: 5039625
    Abstract: A Maximum Areal Density Recessed Oxide Isolation (MADROX) process for forming semiconductor devices, in which forms an insulating layer is formed on a monocrystalline silicon substrate and a patterned polycrystalline silicon-containing layer is formed on the insulating layer. The substrate is then subjected to a low temperature plasma assisted oxidation to form recessed oxide isolation areas in the exposed regions of the substrate, with minimal encroachment under the patterned polycrystalline silicon-containing layer. The patterned polycrystalline silicon-containing layer acts as a mask, without itself being oxidized. Low temperature recessed oxide isolation regions may thereby be formed, without "bird's beak" formation. Maximum Areal Density Bipolar and Field Effect Transistor (MADFET) devices may be formed, using the patterned polycrystalline silicon-containing layer as a device contact if desired.
    Type: Grant
    Filed: April 27, 1990
    Date of Patent: August 13, 1991
    Assignee: MCNC
    Inventors: Arnold Reisman, Mark Kellam, Charles K. Williams, Nandini Tandon