Abstract: Systems implement a software platform that creates dynamic user device pools that facilitate in-person engagement between and among platform users as well as the participation in local events and activities. The system includes a profile server that communicates with one or more user computing devices, such as smartphones. The provider server determines a pool area that can be predefined or determined based on a geometric area surrounding a user computing device. The provider server determines the user devices within the pool area and obtains profile data associated with the user devices where the profile data represents information personal to the platform users. The provider server applies user relationship information and privacy settings to filter the profile data before transmitting the profile data to user computing devices for display. Platform users communicate with other users in the pool area according to permissions settings that safely limit the types of permissible communications.

Abstract: A circuit having an interconnect network and plurality of processing blocks is disclosed. The interconnect network has a plurality of network nodes arranged in a two-dimensional array on a first substrate. Each network node has a plurality of communication ports and is connected to each adjacent network node by a communication bus that connects only those two network nodes and processing blocks adjacent to that communication bus. A programmable switch within each node connects one of the input ports to one of the output ports in response to connection information stored in a memory in that node. Three-dimensional embodiments can be constructed by including a second substrate that overlies the first substrate and includes a second such interconnect network that is connected vertically through one or more nodes. The circuit easily accommodates spare processing blocks that can be substituted for defective blocks by altering the connection information.

Abstract: A circuit having an interconnect network and plurality of processing blocks is disclosed. The interconnect network has a plurality of network nodes arranged in a two-dimensional array on a first substrate. Each network node has a plurality of communication ports and is connected to each adjacent network node by a communication bus that connects only those two network nodes and processing blocks adjacent to that communication bus. A programmable switch within each node connects one of the input ports to one of the output ports in response to connection information stored in a memory in that node. Three-dimensional embodiments can be constructed by including a second substrate that overlies the first substrate and includes a second such interconnect network that is connected vertically through one or more nodes. The circuit easily accommodates spare processing blocks that can be substituted for defective blocks by altering the connection information.