Patents by Inventor Mark L. Farley

Mark L. Farley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method to control memory failure handling on double-data rate dual in-line memory modules
    Patent number: 10761919
    Abstract: An information handling system includes a processor, a dual in-line memory module (DIMM), and a memory controller coupled to the DIMM. The memory controller provides interrupts to the processor each time a read transaction from the DIMM results in a correctable read error. The processor instantiates a failure predictor to receive the interrupts, accumulate a count of the interrupts, and provide a first error indication when the count exceeds a first error threshold. The failure predictor increments the count each time the predictor receives a particular interrupt and decrements the count in accordance with an error leak rate. The error leak rate has a first value when the DIMM is newer than a first age threshold and has a second value when the DIMM is older than the first age threshold.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: September 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: René Franco, Amit S. Shah, Tuyet-Huong Thi Nguyen, Vijay B. Nijhawan, Vadhiraj Sankaranarayanan, Mark L. Farley, Andrew Butcher
  • System and Method to Control Memory Failure Handling on Double-Data Rate Dual In-Line Memory Modules
    Publication number: 20190266036
    Abstract: An information handling system includes a processor, a dual in-line memory module (DIMM), and a memory controller coupled to the DIMM. The memory controller provides interrupts to the processor each time a read transaction from the DIMM results in a correctable read error. The processor instantiates a failure predictor to receive the interrupts, accumulate a count of the interrupts, and provide a first error indication when the count exceeds a first error threshold. The failure predictor increments the count each time the predictor receives a particular interrupt and decrements the count in accordance with an error leak rate. The error leak rate has a first value when the DIMM is newer than a first age threshold and has a second value when the DIMM is older than the first age threshold.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 29, 2019
    Inventors: René Franco, Amit S. Shah, Huong T. Nguyen, Vijay B. Nijhawan, Vadhiraj Sankaranarayanan, Mark L. Farley, Andrew Butcher