Abstract: A method to generate a crystal oscillator clock having a duty cycle via a first stage of a clock circuit, double the crystal oscillator clock and inputting the doubled crystal oscillator clock into a phased-locked loop, feed back a phase-locked loop feedback clock, measure a difference in delay between a first edge of the doubled crystal oscillator clock relative to the phase-locked loop feedback clock and a second edge of the doubled crystal oscillator clock relative to the phase-locked loop feedback clock, and adjust the duty cycle of the crystal oscillator clock based on the difference in delay. A device having a detection circuit to measure a difference in delay between first and second edges of a doubled crystal oscillator clock output relative to a phase-locked loop feedback clock, and a controller to adjust the duty cycle of the clock output based on the difference in delay.

Abstract: A secure electronic data module containing a monolithic semiconductor chip of the type having a memory that is protected by a combination of hardware and software mechanisms such that unauthorized access to the data stored in the memory is prevented. The monolithic semiconductor chip comprises a plurality of solder bumps for attaching the chip to a substrate that may be a printed circuit board or another chip; a multi-level interlaced power and ground lines using minimum geometries; and a detection circuit block for detecting an external trip signal that may be produced by a pre-specified change in an operating condition brought on by unauthorized accessing, or an internal trip signal that may be produced by shorting of power and ground lines or by a change in an oscillator's frequency, also associated with or appurtenant to unauthorized accessing of the secure memory.

Abstract: An integrated circuit terminator for a SCSI bus with resistors made of laser-blowable fuses in an array and a reference voltage source made with a bandgap generator and a two stage amplifier including a dummy isolation stage for providing symmetrical mismatch currents.

Abstract: An integrated circuit terminator for a SCSI bus with resistors made of laser-blowable fuses in an array and a reference voltage source made with a bandgap generator and a two stage amplifier including a dummy isolation stage for providing symmetrical mismatch currents.