Patents by Inventor Mark Liffiton

Mark Liffiton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8954909
    Abstract: A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting a set of design constraints from the hardware design description, where the set of design constraints represents the electronic circuit in terms of signals and logical operations performed on the signals; creating an abstraction model from the set of design constraints, where the abstraction model abstracts one or more of the logical operations in the set of design constraints by replacing the abstracted logical operations with uninterpreted functions; and property checking the abstraction model in relation to one or more design properties. When a violation in the electronic circuit is detected by the property checking step, the feasibility of the violation is then checked and, if the violation is deemed infeasible, the abstraction model is refined.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: February 10, 2015
    Assignee: The Regents of the University of Michigan
    Inventors: Zaher Andraus, Karem A. Sakallah, Mark Liffiton
  • Publication number: 20140229907
    Abstract: A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting a set of design constraints from the hardware design description, where the set of design constraints represents the electronic circuit in terms of signals and logical operations performed on the signals; creating an abstraction model from the set of design constraints, where the abstraction model abstracts one or more of the logical operations in the set of design constraints by replacing the abstracted logical operations with uninterpreted functions; and property checking the abstraction model in relation to one or more design properties. When a violation in the electronic circuit is detected by the property checking step, the feasibility of the violation is then checked and, if the violation is deemed infeasible, the abstraction model is refined.
    Type: Application
    Filed: December 3, 2013
    Publication date: August 14, 2014
    Applicant: The Regents of The University of Michigan
    Inventors: Zaher Andraus, Karem A. Sakallah, Mark Liffiton
  • Patent number: 8601414
    Abstract: A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting a set of design constraints from the hardware design description, where the set of design constraints represents the electronic circuit in terms of signals and logical operations performed on the signals; creating an abstraction model from the set of design constraints, where the abstraction model abstracts one or more of the logical operations in the set of design constraints by replacing the abstracted logical operations with uninterpreted functions; and property checking the abstraction model in relation to one or more design properties. When a violation in the electronic circuit is detected by the property checking step, the feasibility of the violation is then checked and, if the violation is deemed infeasible, the abstraction model is refined.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: December 3, 2013
    Assignee: The Regents of The University of Michigan
    Inventors: Zaher Andraus, Karem A. Sakallah, Mark Liffiton
  • Publication number: 20130145328
    Abstract: A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting a set of design constraints from the hardware design description, where the set of design constraints represents the electronic circuit in terms of signals and logical operations performed on the signals; creating an abstraction model from the set of design constraints, where the abstraction model abstracts one or more of the logical operations in the set of design constraints by replacing the abstracted logical operations with uninterpreted functions; and property checking the abstraction model in relation to one or more design properties. When a violation in the electronic circuit is detected by the property checking step, the feasibility of the violation is then checked and, if the violation is deemed infeasible, the abstraction model is refined.
    Type: Application
    Filed: November 12, 2010
    Publication date: June 6, 2013
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Zaher Andraus, Karem A. Sakallah, Mark Liffiton
  • Publication number: 20110015992
    Abstract: Methods and systems associated with online advertising campaigns are described. For example, systems and methods are described, which provide estimated advertising campaign statistics (e.g., in real-time) based on hypothetical online advertising campaign parameters entered by users. In certain implementations, the described systems combine pre-processed log data with real-time algorithms to estimate statistics for online advertising campaigns, which target a particular set of digital documents that display advertisements.
    Type: Application
    Filed: December 21, 2007
    Publication date: January 20, 2011
    Inventors: Mark Liffiton, Nathalie Criou, Ching Law, Fong Shen