Abstract: A method and computer-usable medium including instructions for performing a method for scheduling executable transactions within a multicore processor comprising a plurality of processor elements. The method includes listing, using at least one distribution queue, a portion of the executable transactions in order of eligibility for execution. A plurality of executable transaction schedulers are provided, wherein each executable transaction scheduler includes a scheduling process for determining a most eligible executable transaction for execution from at least one candidate executable transaction ready for execution. The executable transaction schedulers are linked together to provide a multilevel scheduler. The most eligible executable transaction is output from the multilevel scheduler to the at least one distribution queue.

Abstract: A method and computer-usable medium including instructions for performing a method of managing power consumption in a multicore processor comprising a plurality of processor elements with at least one power saving mode. The method includes listing, using at least one distribution queue, a portion of the executable transactions in order of eligibility for execution. A plurality of executable transaction schedulers are provided. The executable transaction schedulers are linked together to provide a multilevel scheduler. The most eligible executable transaction is output from the multilevel scheduler to the at least one distribution queue. One or more of the plurality of processor elements are placed into a first power saving mode when a number of executable transactions allocated to the plurality of processor elements is such that only a portion of available processor elements are used to execute executable transactions.

Abstract: According to a first aspect of the present invention, there is provided a method of monitoring thread execution within a multicore processor architecture which comprises a plurality of interconnected processor elements for processing the threads, the method comprising receiving a plurality of thread parameter indicators indicative of one or more parameters relating to the function and/or identity of a thread or threads comparing at least some of the thread parameter indicators with a first plurality of predefined criteria each representative of an indicator of interest and generating an output consequential upon thread parameter indicators which have been identified to be of interest as a result of the said comparison.

Abstract: A method and apparatus for resource management in a multicore processor is disclosed. A system management controller (130) provides omnipresent scheduling, synchronisation, load balancing, and power and memory management services to each processing resource (150) within in a multicore processor (10), via a plurality of system management clients (120) implemented in hardware or software. The controller (130) allocates the tasks executing in each processing resource (150) by means of interrupt control signals, which interact directly with the system management clients (120), enabling processing resources (150) to autonomously create, execute and distribute tasks around a parallel system architecture whilst monitoring and policing the use of shared system resources (140).

Abstract: A digital system (100) has two or more nodes (120, 130) and a communication channel (110, 111) for transferring a single stream of ordered data from one node to another. The communication channel (110) has a number of data links (110a-110g) for transferring a plurality of sub-streams of data in a parallel fashion in order to transfer more data than a single data link is capable of transferring. Receivers (132a-132g) each have synchronizing circuitry (200, 202) for synchronizing a byte clock and a frame pulse of each received data sub-stream to the byte clock and frame pulse of a preselected master one of the receivers such that inherent data skew is eliminated.