Patents by Inventor Mark Maciver

Mark Maciver has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7743996
    Abstract: A system and method for data entry by an operator uses data containing a first component and a second component derived therefrom, wherein the second component has error detection and correction abilities therein. The second component of the entered data is used to detect and correct error in the data entered for the first component. The first and second components are preferably characters (e.g., representing GPS position information) entered via a data entry device, while the second component preferably comprises Hamming code. The detection and correction can be performed after data entry and again after signal transmission.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: June 29, 2010
    Assignee: International Business Machines Corporation
    Inventor: Mark A. Maciver
  • Publication number: 20080022193
    Abstract: An interface system is provided between a source component (210) and a destination component (220) having multiple parallel lines for transmitting data or parity bits (231-234, 251-253) and one or more spare lines (241-243). An error detection means (222) identifies one or more faulty lines. A mapping means (228) re-routes data or parity from a faulty line to a spare line. A communication link (208) is provided for communicating the re-routing between the source component (210) and the destination component (220). The error detection and mapping can be repeated to detect and re-route sequential multiple-bit line errors using additional spare lines (241-243).
    Type: Application
    Filed: June 29, 2007
    Publication date: January 24, 2008
    Inventors: Mark Maciver, James MacKenzie
  • Publication number: 20070073639
    Abstract: A data resilience component ensures data integrity by storing a data file and a copy thereof in non-overlapping sectors along the spiral information track of an optical storage medium. The number and location of sectors of the optical storage medium are determined, and, in dependence on this data, the number and location of redundant data bits required to space the stored copy from the stored data file, such that the first sector containing the stored data file and the second sector containing the stored copy are non-adjacent, is determined. The data file, its copy and the redundant bits are then sent in a data stream in their appropriate location to prevent the files from being adjacent for recording.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 29, 2007
    Inventors: MARK MacIVER, JAMES MacKENZIE
  • Publication number: 20060107178
    Abstract: A system and method for data entry by an operator uses data containing a first component and a second component derived therefrom, wherein the second component has error detection and correction abilities therein. The second component of the entered data is used to detect and correct error in the data entered for the first component. The first and second components are preferably characters (e.g., representing GPS position information) entered via a data entry device, while the second component preferably comprises Hamming code. The detection and correction can be performed after data entry and again after signal transmission.
    Type: Application
    Filed: July 7, 2005
    Publication date: May 18, 2006
    Applicant: International Business Machines Corporation
    Inventor: Mark Maciver
  • Publication number: 20020013929
    Abstract: A system for error detection and correction in an interface between two portions of a data processing system is disclosed. The system includes a parity generator in a first portion of the data processing system. The parity generator generates parity bits corresponding to substantially the entirety of bits contained in the interface. The data and parity bits are transmitted across the interface. The system also includes a parity check in a second portion of the data processing system, for checking that the parity bits correspond to the bits for which parity was encoded. An error correction circuit is also provided, in a second portion of the data processing system, for correcting errors in the bits for which parity was encoded. An indication is optionally provided to the data processing system of corrected errors.
    Type: Application
    Filed: April 19, 2001
    Publication date: January 31, 2002
    Applicant: International Business Machines Corporation
    Inventor: Mark A. Maciver