Patents by Inventor Mark McCloy-Stevens

Mark McCloy-Stevens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11705900
    Abstract: Circuitry for controlling current between a load and a power supply, the circuitry comprising: an output stage comprising: an input node configured to be coupled to the power supply; and an output node configured to be coupled to the load; and one or more control nodes for controlling a conduction path between the input node and the output node; and protection circuitry coupled to the one or more control nodes, the protection circuitry configured to break the conduction path between the input node and the output node when a load voltage at the output node exceeds a supply voltage at the input node, wherein the protection circuitry comprises: an active protection circuit configured to break the conduction path when the supply voltage exceeds an operational threshold of the active protection circuit; and a passive protection circuit configured to break the conduction path when the supply voltage is below an operation threshold of the active protection circuit.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: July 18, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Andrew Buist, Mark McCloy-Stevens, Dave Smith, Gordon Russell, Huy Binh Le
  • Patent number: 11536767
    Abstract: The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: December 27, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: James Wells, Saurabh Singh, Huy Binh Le, Gavin Wilson, Niall McGurnaghan, Simon R. Foster, Mark McCloy-Stevens
  • Publication number: 20210242865
    Abstract: Circuitry for controlling current between a load and a power supply, the circuitry comprising: an output stage comprising: an input node configured to be coupled to the power supply; and an output node configured to be coupled to the load; and one or more control nodes for controlling a conduction path between the input node and the output node; and protection circuitry coupled to the one or more control nodes, the protection circuitry configured to break the conduction path between the input node and the output node when a load voltage at the output node exceeds a supply voltage at the input node, wherein the protection circuitry comprises: an active protection circuit configured to break the conduction path when the supply voltage exceeds an operational threshold of the active protection circuit; and a passive protection circuit configured to break the conduction path when the supply voltage is below an operation threshold of the active protection circuit.
    Type: Application
    Filed: January 27, 2021
    Publication date: August 5, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Andrew BUIST, Mark MCCLOY-STEVENS, Dave SMITH, Gordon RUSSELL, Huy Binh LE
  • Publication number: 20210148968
    Abstract: The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.
    Type: Application
    Filed: October 8, 2020
    Publication date: May 20, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: James WELLS, Saurabh SINGH, Huy Binh LE, Gavin WILSON, Niall MCGURNAGHAN, Simon R. FOSTER, Mark MCCLOY-STEVENS
  • Patent number: 10649732
    Abstract: This application relates to apparatus and methods for the multiplication of signals. A multiplication circuit (100) has first and second time-encoding modulators (103a, 103b) configured to receive first and second combined signals (SC1, SC2) respectively, and generate respective first and second PWM signals (SPWM1, SPWM2), each with a cycle frequency that depends substantially on the square of the value of the input combined signal. The first combined signal (SC1) corresponds to a sum of a first and second input signals (S1, S2) and the second combined signal (SC2) corresponds to the difference between the first and second input signals (S1, S2). First and second time-decoding converters (104a, 104b) receive the first and second PWM signals and provide respective first and count values (D1, D2) based on a parameter related to the frequency of the respective first or second PWM signal.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: May 12, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Mark McCloy-Stevens
  • Publication number: 20200042288
    Abstract: This application relates to apparatus and methods for the multiplication of signals. A multiplication circuit (100) has first and second time-encoding modulators (103a, 103b) configured to receive first and second combined signals (SC1, SC2) respectively, and generate respective first and second PWM signals (SPWM1, SPWM2), each with a cycle frequency that depends substantially on the square of the value of the input combined signal. The first combined signal (SC1) corresponds to a sum of a first and second input signals (S1, S2) and the second combined signal (SC2) corresponds to the difference between the first and second input signals (S1, S2). First and second time-decoding converters (104a, 104b) receive the first and second PWM signals and provide respective first and count values (D1, D2) based on a parameter related to the frequency of the respective first or second PWM signal.
    Type: Application
    Filed: July 31, 2018
    Publication date: February 6, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Mark MCCLOY-STEVENS
  • Patent number: 9300212
    Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: March 29, 2016
    Assignee: Cirrus Logic International Semiconductor Ltd.
    Inventors: Andrew Notman, Mark McCloy-Stevens, Douglas James Wallace MacFarlane, Holger Haiplik
  • Patent number: 8729880
    Abstract: A regulator circuit comprising an input for receiving an input voltage; an output stage, configured to switch between said input voltage and a reference voltage to generate an output voltage, in dependence on a modulated signal; a controller, configured to receive an error signal (VERROR) on a control input and to provide the modulated signal to said output stage; an error amplifier, for providing the error signal to the controller in dependence on the output voltage; and presetting circuitry, configured to estimate the error signal in dependence on at least the input voltage, and for presetting the control input with the estimated error signal.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: May 20, 2014
    Assignee: Wolfson Microelectronics plc
    Inventors: Mark McCloy-Stevens, Andrew Notman
  • Patent number: 8638155
    Abstract: A level-shift circuit, comprising: an input, for receiving a first voltage; an output, for outputting a second voltage; a resistor array comprising one or more resistors connected in series to the input; a current sink for providing a current that is independent of the first voltage; a switch arrangement comprising a plurality of switch connections for establishing a selected one from a plurality of force paths between the current sink and the input, the selected force path comprising a selected number of the one or more resistors of said resistor array; and at least one connection between the output and the resistor array that provides a sense path between the resistor array and the output that does not comprise any of the switch connections used to establish each of the plurality of force paths.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: January 28, 2014
    Assignee: Wolfson Microelectronics plc
    Inventors: Andrew Notman, Mark McCloy-Stevens
  • Publication number: 20130314062
    Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.
    Type: Application
    Filed: July 29, 2013
    Publication date: November 28, 2013
    Applicant: Wolfson Microelectronics plc
    Inventors: Andrew Notman, Mark McCloy-Stevens, Dauglas James Wallace MacFarlane, Holger Haiplik
  • Patent number: 8541993
    Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: September 24, 2013
    Assignee: Wolfson Microelectronics plc
    Inventors: Andrew Notman, Mark McCloy-Stevens, Douglas James Wallace MacFarlane, Holger Haiplik
  • Patent number: 8519691
    Abstract: Apparatus and method for providing current limiting in a DC-DC converter and especially to methods and apparatus suitable for a start-up mode of operation. The invention monitors the inductor (L) current when the high side supply switch is on against a peak current limit threshold. If the inductor current reaches the peak current limit threshold the high side switch is turned off. The inductor current when the low side switch is off is monitored against a valley current threshold. As long as the inductor current is above the valley current threshold turn on of the low side switch is inhibited. In this way current limiting is provided and the problems of stair-stepping are avoided. Embodiments employing lossless current sensing are described. The invention may be implemented in a start-up mode of operation wherein the converter is controlled purely by the peak current limit and valley current threshold which are increased over time.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: August 27, 2013
    Assignee: Wolfson Microelectronics plc
    Inventor: Mark McCloy-Stevens
  • Patent number: 8513933
    Abstract: Methods and apparatus for control of DC-DC converters. The DC-DC converter is operable so that the low side supply switch may be inhibited from turning on in a cycle following the high side supply switch turning off. Turn on of the low side switch is inhibited if the time between turn off of the high side switch and the inductor (L) current reaching zero is less than a predetermined duration. Inhibiting the low side switch from turning on can prevent the inductor current from going negative, which would reduce the efficiency of the converter. When turn on of the low side switch is inhibited the inductor current flows through a parallel path, such as a parasitic body diode associated with the low side switch, which allows current flow in one direction only.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: August 20, 2013
    Assignee: Wolfson Microelectronics plc
    Inventors: Andrew Notman, Mark McCloy-Stevens
  • Publication number: 20110050185
    Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.
    Type: Application
    Filed: July 22, 2010
    Publication date: March 3, 2011
    Inventors: Andrew Notman, Mark McCloy-Stevens, Douglas James Wallace MacFarlane, Holger Haiplik
  • Publication number: 20110018515
    Abstract: Apparatus and method for providing current limiting in a DC-DC converter and especially to methods and apparatus suitable for a start-up mode of operation. The invention monitors the inductor (L) current when the high side supply switch is on against a peak current limit threshold. If the inductor current reaches the peak current limit threshold the high side switch is turned off. The inductor current when the low side switch is off is monitored against a valley current threshold. As long as the inductor current is above the valley current threshold turn on of the low side switch is inhibited. In this way current limiting is provided and the problems of stair-stepping are avoided. Embodiments employing lossless current sensing are described. The invention may be implemented in a start-up mode of operation wherein the converter is controlled purely by the peak current limit and valley current threshold which are increased over time.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Inventor: Mark McCloy-Stevens
  • Publication number: 20110018588
    Abstract: A level-shift circuit, comprising: an input, for receiving a first voltage; an output, for outputting a second voltage; a resistor array comprising one or more resistors connected in series to the input; a current sink for providing a current that is independent of the first voltage; a switch arrangement comprising a plurality of switch connections for establishing a selected one from a plurality of force paths between the current sink and the input, the selected force path comprising a selected number of the one or more resistors of said resistor array; and at least one connection between the output and the resistor array that provides a sense path between the resistor array and the output that does not comprise any of the switch connections used to establish each of the plurality of force paths.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Inventors: Andrew Notman, Mark McCloy-Stevens
  • Publication number: 20110018516
    Abstract: Methods and apparatus for control of DC-DC converters. The DC-DC converter is operable so that the low side supply switch may be inhibited from turning on in a cycle following the high side supply switch turning off. Turn on of the low side switch is inhibited if the time between turn off of the high side switch and the inductor (L) current reaching zero is less than a predetermined duration. Inhibiting the low side switch from turning on can prevent the inductor current from going negative, which would reduce the efficiency of the converter. When turn on of the low side switch is inhibited the inductor current flows through a parallel path, such as a parasitic body diode associated with the low side switch, which allows current flow in one direction only.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Inventors: Andrew Notman, Mark McCloy-Stevens
  • Publication number: 20110018507
    Abstract: A regulator circuit comprising an input for receiving an input voltage; an output stage, configured to switch between said input voltage and a reference voltage to generate an output voltage, in dependence on a modulated signal; a controller, configured to receive an error signal (VERROR) on a control input and to provide the modulated signal to said output stage; an error amplifier, for providing the error signal to the controller in dependence on the output voltage; and presetting circuitry, configured to estimate the error signal in dependence on at least the input voltage, and for presetting the control input with the estimated error signal.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Inventors: Mark McCloy-Stevens, Andrew Notman