Patents by Inventor Mark Merrill Aaldering

Mark Merrill Aaldering has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programmable logic device with versatile exclusive or architecture
    Patent number: 6069488
    Abstract: A programmable logic device (PLD) includes a fixed EXCLUSIVE OR gate and a programmable logic array (PLA). The PLA includes a plurality of AND gate and a plurality of OR gates, the output of each AND gate being programmably connected to an input of each of the plurality of OR gates. The output of one of the OR gates of the PLA array is fed to one of the inputs of the fixed EXCLUSIVE OR. Since the output of each of the AND gates is available to each of the OR gates in the PLA array, implementation of the EXCLUSIVE OR function is facilitated and the number of product terms (AND gates) required is reduced as compared to known PLDs. The output of a programmable array logic (PAL) array having a plurality of AND gates non-programmably connected to an OR gate is connected to the other one of the inputs of the fixed EXCLUSIVE OR gate.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: May 30, 2000
    Assignee: Xilinx, Inc.
    Inventor: Mark Merrill Aaldering