Patents by Inventor Mark Morra

Mark Morra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12596673
    Abstract: A technique is disclosed for operand propagation and accumulation within a processing array of an integrated circuit using overlapping patch regions. The system includes an interconnecting processing patch defined over a rectilinear subset of processing elements, with an origin processing element broadcasting operand data to the remaining elements in a directionally constrained, time-staggered wavefront pattern. A logical processing patch is separately defined over a second rectilinear subset of processing elements. The interconnecting processing patch and the logical processing patch partially overlap to form an interconnecting patch mesh comprising a common set of processing elements. Operand data is propagated from the origin of the interconnecting patch to the common processing elements within the patch mesh, enabling operand handoff or accumulation across patch boundaries.
    Type: Grant
    Filed: July 18, 2025
    Date of Patent: April 7, 2026
    Assignee: quadric.io Inc.
    Inventors: Thomas Ng, Michael Leonard, Aman Sikka, Mark Morra, Nigel Drego
  • Publication number: 20260023715
    Abstract: A technique is disclosed for operand propagation and accumulation within a processing array of an integrated circuit using overlapping patch regions. The system includes an interconnecting processing patch defined over a rectilinear subset of processing elements, with an origin processing element broadcasting operand data to the remaining elements in a directionally constrained, time-staggered wavefront pattern. A logical processing patch is separately defined over a second rectilinear subset of processing elements. The interconnecting processing patch and the logical processing patch partially overlap to form an interconnecting patch mesh comprising a common set of processing elements. Operand data is propagated from the origin of the interconnecting patch to the common processing elements within the patch mesh, enabling operand handoff or accumulation across patch boundaries.
    Type: Application
    Filed: July 18, 2025
    Publication date: January 22, 2026
    Applicant: quadric.io Inc.
    Inventors: Thomas Ng, Michael Leonard, Aman Sikka, Mark Morra, Nigel Drego
  • Publication number: 20070235999
    Abstract: The apparatus of the present invention provides a seat belt apparatus configured to restrain an occupant seated in a vehicle car seat having a seat back portion and a seat base portion. The seat belt apparatus includes a lap belt defining an inboard portion and an outboard portion. The seat belt apparatus also includes a tether defining a first end portion and a second end portion. The second end portion of the tether is secured to the outboard portion of the lap belt. A pre-tensioner is positioned below, rearward and inboard of the occupant's outboard hip. The pre-tensioner is selectively configured to retract the tether thereby applying force to the occupant in a downward and inboard direction.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 11, 2007
    Inventors: Mark Morra, Mark Ellis, Derek Guo