Patents by Inventor Mark P. Fleureton

Mark P. Fleureton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312887
    Abstract: A method of producing a hardware abstraction layer (HAL) for software defined radio (SDR) platforms. A HAL software device in a processor of a given SDR platform operates to process data and exchange messages among a waveform software application and a waveform FPGA. A core module in the software device contains a set of software that is common to a number of different SDR platforms including the given platform, to enable the platforms to use HAL interfaces and services needed by the platforms. A custom module in the device contains software that is specific only to the FPGA of the given platform, while the core module provides the platform with the common software to enable the platform to use the HAL interfaces and services. By providing the separate custom and core modules, the overall cost of developing HALs for software radios having different hardware platforms is significantly reduced.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: April 12, 2016
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: George A. Cuiffo, Mark P. Fleureton
  • Publication number: 20120290823
    Abstract: A method of producing a modem hardware abstraction layer (MHAL) within a first processor associated with a modem of a given radio platform. A MHAL software (SW) device within the first processor is configured to process data and exchange messages among a waveform software application, and a field programmable gate array (FPGA) associated with the radio platform. A core module is defined within the SW device, and the core module operates using a common core set of software that is compatible with a number of different radio platforms including the given platform, for producing certain MHAL interfaces and services. A custom module is defined within the SW device, and the custom module operates using such software as required to be compatible with the FPGA of the given platform, and by invoking the MHAL interfaces or services produced by the core module. Priority thread banding and memory management are also provided.
    Type: Application
    Filed: May 1, 2012
    Publication date: November 15, 2012
    Inventors: George A. Cuiffo, Mark P. Fleureton