Abstract: A system and method are described for providing drift compensation for a multimedia receiver which processes multimedia streams from a plurality of satellite transponders and/or cable/broadcast carriers. In one embodiment, the average drift amount for all multimedia signals in a first group of multimedia signals is calculated and, based on the calculation, the drift of the entire group is corrected. This drift is referred to as system drift. In addition, the difference in drift between each individual multimedia signal and the system drift amount is used to correct the individual drift for each multimedia signal.

Abstract: A method and apparatus for switching n data streams for input and output of the data streams by an n input, n output data store without data loss. The data store is divided into n separate storage arrays and each data stream is divided into n equal-sized pieces. Then, during each one of n separate time units, one data stream piece is written into a corresponding one of the storage arrays; or, one data stream piece is read from a corresponding one of the storage arrays. For each data stream, during each time unit i, where 1≦i≦n an ith data stream piece is written into an ith one of the storage arrays, or an ith piece is read from an ith storage array. During each jth time unit, where 1≦j≦n, one data stream piece Pij is written into an ith storage array, or one piece Pij is read from an ith storage array.

Abstract: An architecture and method are disclosed for concurrently processing multimedia data from several satellite transponders or satellite carriers. In one embodiment, a combination of a fast Fourier transform, a complex multiplication, and an inverse fast Fourier transform are performed on a group of transponders/carriers to filter the underlying multimedia content, to decimate the signals and to correct for gain and phase imbalances.

Abstract: A high speed memory system is disclosed. The high speed memory system remembers the active n memory rows for n banks of memory. When a memory access request for a memory address that falls within one of the active memory rows is received, the memory controller immediately responds to the memory access request. When a memory access request for a memory address that does not fall within one of the active memory rows is received, the memory controller immediately precharges and activates the desired memory address. For read operations, the memory controller responds with the data from the requested memory address after the memory has been precharged. For memory write operations, the memory controller forces the processor to halt the memory write request such that the memory controller will prepare itself by, precharging and activating the desired memory row. When the processor reissues the request, the memory controller will be prepared to immediately process the write request.

Abstract: A broadband data broadcast system that allows rich multimedia content to be delivered to a plurality of subscribers is disclosed. The broadband data broadcast system operates by multiplexing a plurality of rich multimedia digital information streams together at a centralized data broadcast center. The data broadcast center then broadcasts the multiplexed digital information stream on a broadcast medium such as satellite broadcasts, radio frequency broadcasts, or digital television broadcasts. A large number of receiver systems receive the broadcast signal and demodulate the broadcast signal to retrieve the multiplexed digital stream. The receiver system extracts a subset of digital information streams that the particular receiver system's owner has designated are of interest. The receiver system caches the interesting digital information stream for later access. The receiver system outputs the interesting digital information streams to a client system upon demand.

Abstract: The invention provides an efficient structure for synthesized static arrays. Array structures are very common in chip design, and often when doing ASIC design the option of custom-designing these arrays does not exist, therefore necessitating that the arrays be synthesized, placed and routed on silicon in a manner similar to random logic. Standard array structures are not easily synthesized, placed and routed. The invention takes advantage of the case in which the design requirements are such that the array is loaded in whole and then remains static for a period of time. The array implementation writes one column of the array (instead of a row) at a time so that the desired contents of the array are “rotated” 90 degrees before being written to the array. This allows the latches in a column to share a gated clock signal, which allows for an array placement optimized for clock distribution and for general routing density.

Abstract: A data broadcasting system is disclosed. The data broadcasting system operates by receiving source material from a number of different sources. The source material is processed by performing adding error correction encoding and in some cases, encryption. The source material from the different sources is then multiplexed together and broadcast on a broadcast medium. The multiplexed digital broadcast is received by a plurality of receiver systems. The receiver systems demultiplex the multiplexed digital stream to obtain desired digital streams. The desired streams are then decrypted if necessary.

Abstract: Methods and apparatuses for bit-level permutations using a Benes fabric are described. In one embodiment, the Benes fabric includes an interconnection of multiple 2×2 switches. The 2×2 switches can be in either a pass-through state or a cross-over state. Each switch is coupled to a control circuit or a control register to control the state of the switch. The manner in which the 2×2 switches are interconnected allows a variety of bit permutations to be selected. The bit permutations can be used, for example, for encryption or decryption of digital data.

Abstract: The invention provides an efficient structure for synthesized static arrays. Array structures are very common in chip design, and often when doing ASIC design the option of custom-designing these arrays does not exist, therefore necessitating that the arrays be synthesized, placed and routed on silicon in a manner similar to random logic. Standard array structures are not easily synthesized, placed and routed. The invention takes advantage of the case in which the design requirements are such that the array is loaded in whole and then remains static for a period of time. The array implementation writes one column of the array (instead of a row) at a time so that the desired contents of the array are “rotated” 90 degrees before being written to the array. This allows the latches in a column to share a gated clock signal, which allows for an array placement optimized for clock distribution and for general routing density.

Abstract: A broadband data broadcast system that allows rich multimedia content to be delivered to a plurality of subscribers is disclosed. The broadband data broadcast system operates by multiplexing a plurality of rich multimedia digital information streams together at a centralized data broadcast center. The data broadcast center then broadcasts the multiplexed digital information stream on a broadcast medium such as satellite broadcasts, radio frequency broadcasts, or digital television broadcasts. A large number of receiver systems receive the broadcast signal and demodulate the broadcast signal to retrieve the multiplexed digital stream. The receiver system extracts a subset of digital information streams that the particular receiver system's owner has designated are of interest. The receiver system caches the interesting digital information stream for later access. The receiver system outputs the interesting digital information streams to a client system upon demand.