Patents by Inventor Mark Pouliot

Mark Pouliot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CRACK STOP FOR LOW K DIELECTRICS
    Publication number: 20080064189
    Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 13, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins
  • Crack stop for low K dielectrics
    Publication number: 20060099775
    Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.
    Type: Application
    Filed: December 22, 2005
    Publication date: May 11, 2006
    Applicant: International Business Machines Corporation
    Inventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins
  • CRACK STOP FOR LOW K DIELECTRICS
    Publication number: 20050026397
    Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.
    Type: Application
    Filed: July 28, 2003
    Publication date: February 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins