Patents by Inventor Mark R. Teepe
Mark R. Teepe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220334333Abstract: A cassette for optical fiber includes one or more optical sensors. The cassette has a spool for handling optical fiber. An adjustable shaft is disposed such that the spool is configured to rotate about the adjustable shaft. The adjustable shaft is configured to handle spools having different diameters. A spool controller is coupled to the adjustable shaft and configured to rotate the adjustable shaft to perform one or more of extract and retract the optical fiber. One or more bushings are disposed proximate the spool and are configured to prevent the optical fiber from jumping off the spool.Type: ApplicationFiled: April 20, 2021Publication date: October 20, 2022Inventors: Jacob N. Chamoun, Qiushu Chen, Peter Kiesel, Mark R. Teepe, Kyle Arakaki
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Patent number: 11460658Abstract: A cassette for optical fiber includes one or more optical sensors. The cassette has a spool for handling optical fiber. An adjustable shaft is disposed such that the spool is configured to rotate about the adjustable shaft. The adjustable shaft is configured to handle spools having different diameters. A spool controller is coupled to the adjustable shaft and configured to rotate the adjustable shaft to perform one or more of extract and retract the optical fiber. One or more bushings are disposed proximate the spool and are configured to prevent the optical fiber from jumping off the spool.Type: GrantFiled: April 20, 2021Date of Patent: October 4, 2022Assignee: Palo Alto Research Center IncorporatedInventors: Jacob N. Chamoun, Qiushu Chen, Peter Kiesel, Mark R. Teepe, Kyle Arakaki
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Optically pumped surface emitting lasers incorporating high reflectivity/bandwidth limited reflector
Patent number: 9124062Abstract: Optically pumped laser structures incorporate reflectors that have high reflectivity and are bandwidth limited to a relatively narrow band around the central laser radiation wavelength. In some cases, the reflectors may be ¾-wavelength distributed Bragg reflectors (DBRs).Type: GrantFiled: March 22, 2012Date of Patent: September 1, 2015Assignee: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Thomas Wunderer, John E. Northrup, Mark R. Teepe, Noble M. Johnson -
Patent number: 9099344Abstract: A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads.Type: GrantFiled: November 18, 2010Date of Patent: August 4, 2015Assignee: Palo Alto Research Center IncorporatedInventors: Clifford F. Knollenberg, Mark R. Teepe, Christopher Chua
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Patent number: 8964796Abstract: A semiconductor light emitting device includes a light guiding structure, a light emitting layer disposed within the light guiding structure, and a structure for discharging excess electric charge within the device. The device may be excited by an electron beam, as opposed to an optical beam, to create electron-hole pairs. The light emitting layer is configured for light generation without requiring a p-n junction, and is therefore not embedded within nor part of a p-n junction. Doping with p-type species is obviated, reducing device loss and permitting operation at a short wavelengths, such as below 300 nm. Various structures, such as a top-side cladding layer, are disclosed for discharging beam-induced charge. A single device may be operated with multiple electron beam pumps, either to enable a relatively thick active layer or to drive multiple separate active layers. Cooperatively curved end facets accommodate for possible off-axis resonance within the active region(s).Type: GrantFiled: June 18, 2013Date of Patent: February 24, 2015Assignee: Palo Alto Research Center IncorporatedInventors: Thomas Wunderer, John E. Northrup, Mark R. Teepe, Zhihong Yang, Christopher L. Chua, Noble M. Johnson
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Publication number: 20140369367Abstract: A semiconductor light emitting device includes a light guiding structure, a light emitting layer disposed within the light guiding structure, and a structure for discharging excess electric charge within the device. The device may be excited by an electron beam, as opposed to an optical beam, to create electron-hole pairs. The light emitting layer is configured for light generation without requiring a p-n junction, and is therefore not embedded within nor part of a p-n junction. Doping with p-type species is obviated, reducing device loss and permitting operation at a short wavelengths, such as below 300 nm. Various structures, such as a top-side cladding layer, are disclosed for discharging beam-induced charge. A single device may be operated with multiple electron beam pumps, either to enable a relatively thick active layer or to drive multiple separate active layers. Cooperatively curved end facets accommodate for possible off-axis resonance within the active region(s).Type: ApplicationFiled: June 18, 2013Publication date: December 18, 2014Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Thomas Wunderer, John E. Northrup, Mark R. Teepe, Zhihong Yang, Christopher L. Chua, Noble M. Johnson
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Patent number: 8822314Abstract: An epitaxial growth method includes plasma treating a surface of a bulk crystalline Aluminum Nitride (AlN) substrate and subsequently heating the substrate in an ammonia-rich ambient to a temperature of above 1000° C. for at least 5 minutes without epitaxial growth. After heating the surface, a III-nitride layer is epitaxially grown on the surface.Type: GrantFiled: June 14, 2012Date of Patent: September 2, 2014Assignee: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Mark R. Teepe, Thomas Wunderer, Zhihong Yang, Noble M. Johnson, Clifford Knollenberg
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Publication number: 20140011345Abstract: An epitaxial growth method includes plasma treating a surface of a bulk crystalline Aluminum Nitride (AlN) substrate and subsequently heating the substrate in an ammonia-rich ambient to a temperature of above 1000° C. for at least 5 minutes without epitaxial growth. After heating the surface, a III-nitride layer is epitaxially grown on the surface.Type: ApplicationFiled: June 14, 2012Publication date: January 9, 2014Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Christopher L. Chua, Mark R. Teepe, Thomas Wunderer, Zhihong Yang, Noble M. Johnson, Clifford Knollenberg
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Publication number: 20130250986Abstract: Optically pumped laser structures incorporate reflectors that have high reflectivity and are bandwidth limited to a relatively narrow band around the central laser radiation wavelength. In some cases, the reflectors may be ¾-wavelength distributed Bragg reflectors (DBRs).Type: ApplicationFiled: March 22, 2012Publication date: September 26, 2013Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Thomas Wunderer, John E. Northrup, Mark R. Teepe, Noble M. Johnson
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Patent number: 8143154Abstract: A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures on the nucleation layer. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.Type: GrantFiled: July 28, 2011Date of Patent: March 27, 2012Assignee: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
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Patent number: 8143647Abstract: A relaxed InGaN template employs a GaN or InGaN nucleation layer grown at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.Type: GrantFiled: December 18, 2009Date of Patent: March 27, 2012Assignee: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
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Publication number: 20110281424Abstract: A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures on the nucleation layer. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.Type: ApplicationFiled: July 28, 2011Publication date: November 17, 2011Applicant: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
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Publication number: 20110150017Abstract: A relaxed InGaN template employs a GaN or InGaN nucleation layer grown at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.Type: ApplicationFiled: December 18, 2009Publication date: June 23, 2011Applicant: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
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Publication number: 20110062486Abstract: A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads.Type: ApplicationFiled: November 18, 2010Publication date: March 17, 2011Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Clifford F. Knollenberg, Mark R. Teepe, Christopher Chua
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Patent number: 7858521Abstract: A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads.Type: GrantFiled: December 21, 2006Date of Patent: December 28, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Clifford F. Knollenberg, Mark R. Teepe, Christopher L. Chua
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Patent number: 7812421Abstract: According to one described embodiment, a light emitting device structure includes an epitaxial contact layer disposed on an active region of the light emitting device structure, a multi-layer reflector disposed at least partially on the epitaxial contact layer, and conductive contacts abutting the epitaxial contact layer, the multi-layer reflector enclosing the conductive contacts.Type: GrantFiled: December 21, 2007Date of Patent: October 12, 2010Assignee: Palo Also Research Center IncorporatedInventors: Christopher L. Chua, Mark R. Teepe, Clifford Knollenberg, Zhihong Yang
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Patent number: 7714340Abstract: A bottom-emitting nitride light-emitting device with enhanced light extraction efficiency is provided. The increased light output is provided by the reflector that redirects upward-going light towards the bottom output. A mesh contact area, in one form, spreads current across the entire carrier injection area without occupying the entire top surface of the device.Type: GrantFiled: September 6, 2006Date of Patent: May 11, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Christopher L. Chua, Zhihong Yang, Noble M. Johnson, Mark R. Teepe
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Publication number: 20080153281Abstract: A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads.Type: ApplicationFiled: December 21, 2006Publication date: June 26, 2008Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Clifford F. Knollenberg, Mark R. Teepe, Christopher Chua
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Publication number: 20080144688Abstract: According to one described embodiment, a light emitting device structure includes an epitaxial contact layer disposed on an active region of the light emitting device structure, a multi-layer reflector disposed at least partially on the epitaxial contact layer, and conductive contacts abutting the epitaxial contact layer, the multi-layer reflector enclosing the conductive contacts.Type: ApplicationFiled: December 21, 2007Publication date: June 19, 2008Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Christopher L. Chua, Mark R. Teepe, Clifford Knollenberg, Zhihong Yang
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Publication number: 20080123711Abstract: A bottom-emitting nitride light-emitting device with enhanced light extraction efficiency is provided. The increased light output is provided by the reflector that redirects upward-going light towards the bottom output. A mesh contact area, in one form, spreads current across the entire carrier injection area without occupying the entire top surface of the device.Type: ApplicationFiled: September 6, 2006Publication date: May 29, 2008Inventors: Christopher L. Chua, Zhihong Yang, Noble M. Johnson, Mark R. Teepe