Patents by Inventor Mark R. Whitaker
Mark R. Whitaker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9846664Abstract: A RFID system includes an RFID controller incorporating a serial bus master coupled via a serial bus to a serial bus slave device, whereby the RFID controller controls power supply and/or power mode of the salve device in order that the slave device is powered and able to communicate with the RFID controller in response to RFID commands received from an RFID reader, and unpowered or in a low power mode otherwise.Type: GrantFiled: March 12, 2015Date of Patent: December 19, 2017Assignee: Cypress Semiconductor CorporationInventors: Mark R. Whitaker, Kirk Greefkes
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Patent number: 9798909Abstract: A radio frequency identification (RFID) integrated circuit includes a transceiver and a processing device. The transceiver may to transmit a first continuous wave radio frequency (RF) signal to a bridge in a no-wire format via an antenna, where the transceiver is to start transmitting the modulated or continuous wave RF signal at a first amplitude value and increase an amplitude of the modulated or continuous wave RF signal to a second amplitude value at which an acknowledge (ACK) pulse is detected. The transceiver may receive a reflected wave RF signal in the no-wire format. The processing device may detect the ACK pulse in the reflected wave RF signal. The processing device may transmit a second modulated or continuous wave RF signal to the transceiver in the no-wire format.Type: GrantFiled: September 30, 2016Date of Patent: October 24, 2017Assignee: Cypress Semiconductor CorporationInventors: Douglas Moran, Mark R. Whitaker
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Publication number: 20170103240Abstract: A radio frequency identification (RFID) integrated circuit includes a transceiver and a processing device. The transceiver may to transmit a first continuous wave radio frequency (RF) signal to a bridge in a no-wire format via an antenna, where the transceiver is to start transmitting the modulated or continuous wave RF signal at a first amplitude value and increase an amplitude of the modulated or continuous wave RF signal to a second amplitude value at which an acknowledge (ACK) pulse is detected. The transceiver may receive a reflected wave RF signal in the no-wire format. The processing device may detect the ACK pulse in the reflected wave RF signal. The processing device may transmit a second modulated or continuous wave RF signal to the transceiver in the no-wire format.Type: ApplicationFiled: September 30, 2016Publication date: April 13, 2017Inventors: Mark R. Whitaker, Douglas Moran
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Publication number: 20150227480Abstract: A RFID system includes an RFID controller incorporating a serial bus master coupled via a serial bus to a serial bus slave device, whereby the RFID controller controls power supply and/or power mode of the salve device in order that the slave device is powered and able to communicate with the RFID controller in response to RFID commands received from an RFID reader, and unpowered or in a low power mode otherwise.Type: ApplicationFiled: March 12, 2015Publication date: August 13, 2015Inventors: Mark R. Whitaker, Kirk Greefkes
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Patent number: 9092582Abstract: A serial interface includes a select node, a clock node, a first bidirectional data port, a second bidirectional data port, and shift register circuitry coupled to both data ports such that a leading edge and a falling edge of a clock signal associated with the clock node are used to shift or transfer data.Type: GrantFiled: July 9, 2010Date of Patent: July 28, 2015Assignee: Cypress Semiconductor CorporationInventor: Mark R. Whitaker
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Patent number: 8957763Abstract: A method of operating a memory in an RFID application includes locating a memory pointer at a fixed read/writeable memory location in the memory, determining a range of a pedigree buffer, initializing the memory pointer to a lowest value in the range, providing a second memory location that serves as a trigger address for an indirect write, and writing to a next location in the pedigree buffer by directing write data to the trigger address, which is then automatically written at a location pointed to by the memory pointer.Type: GrantFiled: July 9, 2010Date of Patent: February 17, 2015Assignee: Cypress Semiconductor CorporationInventors: Mark R. Whitaker, Danny Lee Secrest
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Publication number: 20140327553Abstract: A system can include a passive wireless interface circuit that generates data from a wireless signal and further includes an energy harvesting circuit that generates first operating power from the wireless signal; a meter interface circuit configured to receive at least one input signal and second operating power from a metering device; logic circuits configured to arbitrate accesses to nonvolatile storage circuits from the passive wireless interface and meter interface circuits using the first or second operating power.Type: ApplicationFiled: September 26, 2013Publication date: November 6, 2014Applicant: Cypress Semiconductor CorporationInventors: Mark R. Whitaker, Douglas D. Moran, Craig Taylor
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Patent number: 8723654Abstract: A memory circuit includes a memory, a memory access control circuit coupled to the memory, an RFID interface coupled to the memory access control circuit, a secondary interface coupled to the memory access control circuit, and an interrupt manager coupled to the memory access control circuit, the RFID interface, and the secondary interface.Type: GrantFiled: July 9, 2010Date of Patent: May 13, 2014Assignee: Cypress Semiconductor CorporationInventors: Mark R. Whitaker, Leslie Joseph Marentette
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Patent number: 8686836Abstract: A fast block write command includes providing an RFID tag having a memory, and using a stored address pointer to point to a known address in the memory, wherein the stored address pointer points to a starting address at a known safe block in the memory. The method is performed without an intermediate buffer. The received data is written to the known safe block and a cyclic redundancy check is computed on the received data. If the cyclic redundancy check matches, the received data is retained and the stored address pointer is updated. If the cyclic redundancy check does not match, the stored address pointer is kept for a future write operation. Further block writes can be disallowed after an initial successful block write.Type: GrantFiled: July 9, 2010Date of Patent: April 1, 2014Assignee: Cypress Semiconductor CorporationInventors: Mark R. Whitaker, Doug D. Moran, Robert John Clarke, Alexander Antony John Roach
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Publication number: 20120007723Abstract: A memory circuit includes a memory, a memory access control circuit coupled to the memory, an RFID interface coupled to the memory access control circuit, a secondary interface coupled to the memory access control circuit, and an interrupt manager coupled to the memory access control circuit, the RFID interface, and the secondary interface.Type: ApplicationFiled: July 9, 2010Publication date: January 12, 2012Applicant: Ramtron International CorporationInventors: Mark R. Whitaker, Leslie Joseph Marentette
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Publication number: 20120007722Abstract: A method of operating a memory in an RFID application includes locating a memory pointer at a fixed read/writeable memory location in the memory, determining a range of a pedigree buffer, initializing the memory pointer to a lowest value in the range, providing a second memory location that serves as a trigger address for an indirect write, and writing to a next location in the pedigree buffer by directing write data to the trigger address, which is then automatically written at a location pointed to by the memory pointer.Type: ApplicationFiled: July 9, 2010Publication date: January 12, 2012Applicant: RAMTRON INTERNATIONAL CORPORATIONInventors: Mark R. Whitaker, Danny Lee Secrest
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Publication number: 20120007720Abstract: A serial interface includes a select node, a clock node, a first bidirectional data port, a second bidirectional data port, and shift register circuitry coupled to both data ports such that a leading edge and a falling edge of a clock signal associated with the clock node are used to shift or transfer data.Type: ApplicationFiled: July 9, 2010Publication date: January 12, 2012Applicant: RAMTRON INTERNATIONAL CORPORATIONInventor: Mark R. Whitaker
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Publication number: 20120007721Abstract: A fast block write command includes providing an RFID tag having a memory, and using a stored address pointer to point to a known address in the memory, wherein the stored address pointer points to a starting address at a known safe block in the memory. The method is performed without an intermediate buffer. The received data is written to the known safe block and a cyclic redundancy check is computed on the received data. If the cyclic redundancy check matches, the received data is retained and the stored address pointer is updated. If the cyclic redundancy check does not match, the stored address pointer is kept for a future write operation. Further block writes can be disallowed after an initial successful block write.Type: ApplicationFiled: July 9, 2010Publication date: January 12, 2012Applicant: Ramtron International CorporationInventors: Mark R. Whitaker, Doug D. Moran, Robert John Clarke, Alexander Antony John Roach
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Patent number: 7526693Abstract: A circuit that includes a controller and at least one control I/O pin. When the controller is placed into an initial state, the controller initializes the circuit into an initial operation mode. Depending on whether or not signal(s) satisfying predetermined criteria are applied to at least one of the control I/O pins, the controller will cause the circuit to enter one of two or more post-initial operation modes. Accordingly, by initializing the controller, and by controlling a signal on the control I/O pin(s), the operating mode of the circuit may be controlled. In one embodiment, a given control pin might be configurable to be both analog and digital, depending on the circuit's operation mode.Type: GrantFiled: March 9, 2006Date of Patent: April 28, 2009Assignee: Semiconductor Components Industries, LLCInventors: David J. Willis, Matthew Austin Tyler, Justin Mark Gedge, Mark R. Whitaker
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Patent number: 5936411Abstract: A method and apparatus for measuring displacement of one location of a structure, relative to another, spaced apart location.Type: GrantFiled: November 28, 1997Date of Patent: August 10, 1999Assignee: Sarcos L.C.Inventors: Stephen C. Jacobsen, Michael G. Mladejovsky, Mark R. Whitaker, Brian J. Maclean
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Patent number: 5627860Abstract: A peak and valley detection system and method are shown for a selective call receiving device (10). The peak and valley detection system quickly and accurately detects and tracks to the peak and valley of a two level and/or four-level signal. A signal value representing a received signal is compared by a CPU (28) to the sum of a peak variable and attack constant. The peak variable is updated to a first value if the received signal value is less than the sum and is updated to a second value if the received signal value is not less than the sum. Similarly, the received signal is compared by the CPU (28) to a difference between a valley variable and attack constant. The valley variable is updated to a third value if the received signal value is greater than the difference value and updated to a fourth value if the received signal value is not greater than the difference value. The peak and valley variables attack and decay at non-constant rates and independently of one another.Type: GrantFiled: June 1, 1995Date of Patent: May 6, 1997Assignee: Motorola, Inc.Inventors: Carol A. McKinny, Christopher B. Rausch, Mark L. Oliboni, Mark R. Whitaker, Mark H. Babcock, Tuan S. Hoang