Abstract: A technique for performing a path tracing operation is provided. A cache is interrogated using a probe operation that returns a Boolean result for each of a plurality of scene data elements associated with the path tracing operation. The Boolean result indicates presence or absence of a scene data element in the cache. The path tracing operation executes at least a first instruction based at least in part on the probe operation returning a Boolean result indicating absence of one of the scene data elements in the cache. The path tracing operation executes at least a second instruction based at least in part on the probe operation returning a Boolean result indicating presence of said one scene data element in the cache, wherein the first instruction is different from the second instruction.

Abstract: Offloading operations for a computing system includes executing an application by a Central Processing Unit (CPU) of the computing system. The application includes a first set of operations and a second set of operations. The first set of operations may be executed by a Graphics Processing Unit of the computing system. The Graphics Processing Unit may execute the first set of operations under the control of the CPU. The second set of operations may be executed by a Smart Network Interface Controller of the computing system. The Smart Network Interface Controller may execute the second set of operations under control of the CPU.

Abstract: Techniques herein involve building bounding volume hierarchies for ray tracing using neural networks. These techniques use one trained neural network per animated mesh, with each such neural network being trained for a particular mesh topology. Meshes can be animated or otherwise modified to represent a single geometry object or portion of a geometry object in various animation states. Training a single neural network for each animated mesh allows such a neural network to generate BVHs for any animation state for the corresponding animated mesh in a robust manner. In other words, by limiting the responsibility of each such trained neural network to a single mesh topology (and therefore providing constraints to what the trained neural network must learn), it is possible for such a trained neural network to robustly and accurately generate BVHs.

Abstract: A server employs a shared raytracing context to generate video streams for multiple client devices. The server uses the shared raytracing context to perform raytracing operations for each of the client devices, and based on the raytracing operations generates different sets of image frames. The server then streams each set of image frames to a corresponding client device over a network.

Abstract: A server employs shared ray tracing data to generate video streams for multiple client devices in parallel. The server receives requests to perform ray tracing tasks for multiple client devices to depict at least respective portions of a scene, uses the shared ray tracing data to perform ray tracing operations for each of the client devices, based on the ray tracing operations generates different sets of image frames, and streams each set of image frames to a corresponding client device over a network.

Abstract: Local reconstruction techniques of remotely rendered digital content are described. In one or more examples, a device includes a decoder implemented in hardware and configured to generate a decoded digital image from an encoded digital image and a renderer implemented in hardware and configured to reconstruct a digital image from the decoded digital image by rendering the decoded digital image using a machine-learning model.

Abstract: A technique for performing a path tracing operation is provided. A cache is interrogated using a probe operation that returns a Boolean result for each of a plurality of scene data elements associated with the path tracing operation. The Boolean result indicates presence or absence of a scene data element in the cache. The path tracing operation executes at least a first instruction based at least in part on the probe operation returning a Boolean result indicating absence of one of the scene data elements in the cache. The path tracing operation executes at least a second instruction based at least in part on the probe operation returning a Boolean result indicating presence of said one scene data element in the cache, wherein the first instruction is different from the second instruction.

Abstract: A server employs a shared raytracing context to generate video streams for multiple client devices. The server uses the shared raytracing context to perform raytracing operations for each of the client devices, and based on the raytracing operations generates different sets of image frames. The server then streams each set of image frames to a corresponding client device over a network.

Abstract: A computer-implemented method of operating a device is provided. The method comprises operating a sensor to capture a data input, individuating an element of the data input, tagging an individuated element with metadata, matching the metadata with an associated permission set, and applying a restricting function defined in the associated permission set to the individuated element during a process flow to produce augmented reality output data restricted as required by the associated permission set. A device is also provided, comprising a sensor, an individuating component to individuate an element of sensor data from the sensor, a tagging component to tag the individuated element, a matching component to match a tag of the individuated element with a permission of a permission set, and a restricting function component to restrict an application's interaction with the individuated element.

Abstract: A computer-implemented method includes obtaining trained neural networks for performing a common task and test data for evaluating the performance of the trained neural networks, and inspecting the trained neural networks to identify functional blocks common to a plurality of the trained neural networks. For each identified functional block, extracting a respective network component for implementing the functional block within each of at least some of the trained neural networks, and for each extracted network component, evaluating performance of the network component, and storing performance data indicating said performance of the network component.

Abstract: A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g., computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.

Abstract: A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g.,. computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.

Abstract: A method for implementing a software-managed cache comprises determining an object identifier (ID) for each of a first set of objects of a plurality of objects resident in a local memory, to generate a first cache table, the first cache table comprising a plurality of entries. Each object comprises an object ID and an effective address. The method receives a request for an object, the request comprising an object ID. The method compares the received object ID with the entries in the first cache table. In the event the received object ID matches an entry in the first cache table, the method returns the matching entry in response to the request. In the event the received object ID does not match an entry in the first cache table, the method calculates an effective address in the local memory of the object associated with the object ID.

Abstract: A cache manager receives a request for data, which includes a requested effective address. The cache manager determines whether the requested effective address matches a most recently used effective address stored in a mapped tag vector. When the most recently used effective address matches the requested effective address, the cache manager identifies a corresponding cache location and retrieves the data from the identified cache location. However, when the most recently used effective address fails to match the requested effective address, the cache manager determines whether the requested effective address matches a subsequent effective address stored in the mapped tag vector. When the cache manager determines a match to a subsequent effective address, the cache manager identifies a different cache location corresponding to the subsequent effective address and retrieves the data from the different cache location.

Abstract: A method comprises receiving scene model data including a scene geometry model and a plurality of pixel data describing objects arranged in a scene. The method generates a primary ray based on a selected first pixel data. In the event the primary ray intersects an object in the scene, the method determines primary hit color data and generates a plurality of secondary rays. The method groups the secondary packets and arranges the packets in a queue based on the octant of each direction vector in the secondary ray packet. The method generates secondary color data based on the secondary ray packets in the queue and generates a pixel color based on the primary hit color data, and the secondary color data. The method generates an image based on the pixel color for the pixel data.

Abstract: An approach is provided to allow virtual devices that use a plurality of processors in a multiprocessor systems, such as the BE environment. Using this method, a synergistic processing unit (SPU) can either be dedicated to performing a particular function (i.e., audio, video, etc.) or a single SPU can be programmed to perform several functions on behalf of the other processors in the system. The application, preferably running in one of the primary (PU) processors, issues IOCTL commands through device drivers that correspond to SPUs. The kernel managing the primary processors responds by sending an appropriate message to the SPU that is performing the dedicated function. Using this method, an SPU can be virtualized for swapping multiple tasks or dedicated to performing a particular task.

Abstract: A method comprises receiving scene model data including a scene geometry model and a plurality of pixel data describing objects arranged in a scene. The method generates a primary ray based on a selected first pixel data. In the event the primary ray intersects an object in the scene, the method determines primary hit color data and generates a plurality of secondary rays. The method groups the secondary packets and arranges the packets in a queue based on the octant of each direction vector in the secondary ray packet. The method generates secondary color data based on the secondary ray packets in the queue and generates a pixel color based on the primary hit color data, and the secondary color data. The method generates an image based on the pixel color for the pixel data.

Abstract: An application thread executes a direct branch instruction that is stored in an instruction cache line. Upon execution, the direct branch instruction branches to a branch descriptor that is also stored in the instruction cache line. The branch descriptor includes a trampoline branch instruction and a target instruction space address. Next, the trampoline branch instruction sends a branch descriptor pointer, which points to the branch descriptor, to an instruction cache manager. The instruction cache manager extracts the target instruction space address from the branch descriptor, and executes a target instruction corresponding to the target instruction space address. In one embodiment, the instruction cache manager generates a target local store address by masking off a portion of bits included in the target instruction space address. In turn, the application thread executes the target instruction located at the target local store address accordingly.

Abstract: An approach that uses a handler to detect asynchronous lock line reservation lost events, and switching tasks based upon whether a condition is true or a mutex lock is acquired is presented. A synergistic processing unit (SPU) invokes a first thread and, during execution, the first thread requests external data that is shared with other threads or processors in the system. This shared data may be protected with a mutex lock or other shared memory synchronization constructs. When requested data is not available, the SPU switches to a second thread and monitors lock line reservation lost events in order to check when the data is available. When the data is available, the SPU switches back to the first thread and processes the first thread's request.

Abstract: The present invention provides for notifying threads. A determination is made whether there is a condition for which a thread is to be notified. If so, a notification indicia is broadcasted. A flag is set in at least one memory storage area as a function of the notification indicia wherein the setting the flag occurs without the intervention of an operating system. Therefore, latencies for notification of threads are minimized.