Patents by Inventor Mark Ruberto

Mark Ruberto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140225805
    Abstract: A system according to one embodiment includes a plurality of antennas configured on a conformal material, the conformal material capable of conforming to a contour of a platform; and driver circuitry coupled to each of the plurality of antennas, wherein the driver circuitry comprises a plurality of transceivers, the plurality of transceivers configured to provide independently adjustable phase delay in the coupling to each of the plurality of antennas.
    Type: Application
    Filed: October 1, 2011
    Publication date: August 14, 2014
    Inventors: Helen K. Pan, Mark Ruberto, Bryce D. Horine, Shmuel Ravid
  • Patent number: 8467737
    Abstract: Disclosed are integration approaches for mm-wave array type architectures using multilayer substrate technologies. For instance, an apparatus may include a first substrate layer, a second substrate layer, and a third substrate layer. The first substrate layer has a first plurality of array elements, and the second substrate layer has a second plurality of array elements. The third substrate layer has an integrated circuit to exchange one or more radio frequency (RF) signals with the first and second pluralities of array elements. The first and second substrate layers are separated by approximately a half wavelength (?/2) corresponding to the one or more RF signals.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: June 18, 2013
    Assignee: Intel Corporation
    Inventors: Debabani Choudhury, Mark Ruberto
  • Publication number: 20120235881
    Abstract: Embodiments of wireless antenna array systems to achieve three-dimensional beam coverage are described herein. Disclosed is an integrated multiple phased antenna array on a flexible substrate with one RFIC. In this way the module can be molded onto the contour of a platform such as a notebook or a hub of the personal area network or local area network. The multiple phased array can be 3D bent in a compact size to fit into thin mobile platforms. Different array antennas or antennas radiate in different spherical directions with beam scanning capabilities while driven simultaneously by one RFIC chip.
    Type: Application
    Filed: March 15, 2012
    Publication date: September 20, 2012
    Inventors: Helen K. Pan, Mark Ruberto, Bryce Horine, Shmuel Ravid
  • Publication number: 20100167666
    Abstract: Disclosed are integration approaches for mm-wave array type architectures using multilayer substrate technologies. For instance, an apparatus may include a first substrate layer, a second substrate layer, and a third substrate layer. The first substrate layer has a first plurality of array elements, and the second substrate layer has a second plurality of array elements. The third substrate layer has an integrated circuit to exchange one or more radio frequency (RF) signals with the first and second pluralities of array elements. The first and second substrate layers are separated by approximately a half wavelength (?/2) corresponding to the one or more RF signals.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Debabani Choudhury, Mark Ruberto
  • Patent number: 7705684
    Abstract: An integrated CMOS power amplifier system to improve amplifier performance, the integrated CMOS power amplifier system including a plurality of differential main amplifier cores, a plurality of ground pads, and a plurality of routes to connect the plurality of differential main amplifier cores to the plurality of ground pads. Each differential main amplifier core includes a pair of collocated main amplifier core transistors. Each ground pad is connected to a subset of the differential main amplifier cores. Embodiments of the integrated CMOS power amplifier system decrease parasitic inductance to ground and increase the transconductance and amplification of the integrated CMOS power amplifier system, thus improving performance.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: April 27, 2010
    Assignee: Intel Corporation
    Inventors: Offir Degani, Mark Ruberto
  • Publication number: 20090322427
    Abstract: An integrated CMOS power amplifier system to improve amplifier performance, the integrated CMOS power amplifier system including a plurality of differential main amplifier cores, a plurality of ground pads, and a plurality of routes to connect the plurality of differential main amplifier cores to the plurality of ground pads. Each differential main amplifier core includes a pair of collocated main amplifier core transistors. Each ground pad is connected to a subset of the differential main amplifier cores. Embodiments of the integrated CMOS power amplifier system decrease parasitic inductance to ground and increase the transconductance and amplification of the integrated CMOS power amplifier system, thus improving performance.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Ofir Degani, Mark Ruberto