Patents by Inventor Mark S. Hefty

Mark S. Hefty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220210639
    Abstract: In an embodiment, at least one interface mechanism may be provided. The mechanism may permit, at least in part, at least one process allocate, at least in part, and/or configure, at least in part, at least one network-associated object. Such allocation and/or configuration, at least in part, may be in accordance with at least one parameter set that may correspond, at least in part, to at least one query issued by the at least one process via the mechanism. Many modifications are possible without departing from this embodiment.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 30, 2022
    Applicant: Intel Corporation
    Inventors: William R. Magro, Todd M. Rimmer, Robert J. Woodruff, Mark S. Hefty, Sayantan Sur
  • Patent number: 11246027
    Abstract: In an embodiment, at least one interface mechanism may be provided. The mechanism may permit, at least in part, at least one process allocate, at least in part, and/or configure, at least in part, at least one network-associated object. Such allocation and/or configuration, at least in part, may be in accordance with at least one parameter set that may correspond, at least in part, to at least one query issued by the at least one process via the mechanism. Many modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 8, 2022
    Assignee: Intel Corporation
    Inventors: William R. Magro, Todd M. Rimmer, Robert J. Woodruff, Mark S. Hefty, Sayantan Sur
  • Patent number: 10334047
    Abstract: The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: June 25, 2019
    Assignee: Intel Corporation
    Inventor: Mark S. Hefty
  • Patent number: 10055371
    Abstract: Embodiments of apparatuses and methods for remote direct memory access (RDMA) with commit acknowledgements (ACKs) are described. In embodiments, a device may include a process queue to store a remote direct memory access (RDMA) request from an initiator to update a target memory. The device may further include a control module, coupled to the process queue, to issue a commit operation to the target memory based on the RDMA request and generate an acknowledgement, ACK, to be sent to the initiator on completion of the commit operation. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: August 21, 2018
    Assignee: Intel Corporation
    Inventors: Mark S. Hefty, Robert J. Woodruff
  • Publication number: 20180146038
    Abstract: The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer.
    Type: Application
    Filed: September 26, 2017
    Publication date: May 24, 2018
    Applicant: Intel Corporation
    Inventor: Mark S. Hefty
  • Patent number: 9774677
    Abstract: The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RDMA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: September 26, 2017
    Assignee: Intel Corporation
    Inventor: Mark S. Hefty
  • Patent number: 9749413
    Abstract: Methods and apparatus to provide peer-to-peer interrupt signaling between devices coupled via one or more interconnects are described. In one embodiment, a NIC (Network Interface Card such as a Remote Direct Memory Access (RDMA) capable NIC) transfers data directly into or out of the memory of a peer device that is coupled to the NIC via one or more interconnects, bypassing a host computing/processing unit and/or main system memory. Other embodiments are also disclosed.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: August 29, 2017
    Assignee: Intel Corporation
    Inventors: Mark S. Hefty, Robert J. Woodruff, Jerrie L. Coffman, William R. Magro
  • Publication number: 20170104692
    Abstract: In an embodiment, at least one interface mechanism may be provided. The mechanism may permit, at least in part, at least one process allocate, at least in part, and/or configure, at least in part, at least one network-associated object. Such allocation and/or configuration, at least in part, may be in accordance with at least one parameter set that may correspond, at least in part, to at least one query issued by the at least one process via the mechanism. Many modifications are possible without departing from this embodiment.
    Type: Application
    Filed: September 29, 2016
    Publication date: April 13, 2017
    Inventors: WILLIAM R. MAGRO, TODD M. RIMMER, ROBERT J. WOODRUFF, MARK S. HEFTY, SAYANTAN SUR
  • Patent number: 9560117
    Abstract: An embodiment includes a low-latency mechanism for performing a checkpoint on a distributed application. More specifically, an embodiment of the invention includes processing a first application on a compute node, which is included in a cluster, to produce first computed data and then storing the first computed data in volatile memory included locally in the compute node; halting the processing of the first application, based on an initiated checkpoint, and storing first state data corresponding to the halted first application in the volatile memory; storing the first state information and the first computed data in non-volatile memory included locally in the compute node; and resuming processing of the halted first application and then continuing the processing the first application to produce second computed data while simultaneously pulling the first state information and the first computed data from the non-volatile memory to an input/output (IO) node.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: January 31, 2017
    Assignee: Intel Corporation
    Inventors: Mark S. Hefty, Arlin Davis, Robert Woodruff, Sayantan Sur, Shiow-wen Cheng
  • Patent number: 9495324
    Abstract: One embodiment provides a method for receiving subnet administration (SA) data using a remote direct memory access (RDMA) transfer. The method includes formatting, by a network node element, an SA data query with an RDMA-capable flag; configuring, by the network node element, a reliably-connected queue pair (RCQP) to receive an RDMA transfer from a subnet manager in communication with the network node element on an RDMA-capable network; and allocating, by the network node element, an RDMA write target buffer to receive the SA data using an RDMA transfer from the subnet manager in response to the SA data query.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: November 15, 2016
    Assignee: Intel Corporation
    Inventor: Mark S. Hefty
  • Patent number: 9490988
    Abstract: The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventor: Mark S. Hefty
  • Patent number: 9479506
    Abstract: In an embodiment, at least one interface mechanism may be provided. The mechanism may permit, at least in part, at least one process allocate, at least in part, and/or configure, at least in part, at least one network-associated object. Such allocation and/or configuration, at least in part, may be in accordance with at least one parameter set that may correspond, at least in part, to at least one query issued by the at least one process via the mechanism. Many modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: William R. Magro, Todd M. Rimmer, Robert J. Woodruff, Mark S. Hefty, Sayantan Sur
  • Publication number: 20160124877
    Abstract: Embodiments of apparatuses and methods for remote direct memory access (RDMA) with commit acknowledgements (ACKs) are described. In embodiments, a device may include a process queue to store a remote direct memory access (RDMA) request from an initiator to update a target memory. The device may further include a control module, coupled to the process queue, to issue a commit operation to the target memory based on the RDMA request and generate an acknowledgement, ACK, to be sent to the initiator on completion of the commit operation. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 3, 2014
    Publication date: May 5, 2016
    Inventors: Mark S. Hefty, Robert J. Woodruff
  • Patent number: 9288160
    Abstract: Methods, systems, and apparatus for extending the size of Infiniband subnets using GID switching in an Infiniband fabric. An Infiniband subnet is defined to include multiple local identifier (LID) domains, each including multiple nodes interconnected via one or more LID switches. In turn, the LID domains are interconnected via one or more GID switches. Messages may be transferred between nodes in a given LID domain using LID switches in the domain. Messages may be transferred between nodes in separate LID domains by routing the messages via one or more GID switches. In various embodiments, GID switches may be implemented to also operate as LID switches and perform routing based on selected packet header fields.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventor: Mark S. Hefty
  • Publication number: 20150305006
    Abstract: In an embodiment, at least one interface mechanism may be provided. The mechanism may permit, at least in part, at least one process allocate, at least in part, and/or configure, at least in part, at least one network-associated object. Such allocation and/or configuration, at least in part, may be in accordance with at least one parameter set that may correspond, at least in part, to at least one query issued by the at least one process via the mechanism. Many modifications are possible without departing from this embodiment.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 22, 2015
    Inventors: WILLIAM R. MAGRO, TODD M. RIMMER, ROBERT J. WOODRUFF, MARK S. HEFTY, SAYANTAN SUR
  • Publication number: 20140250202
    Abstract: Methods and apparatus to provide peer-to-peer interrupt signaling between devices coupled via one or more interconnects are described. In one embodiment, a NIC (Network Interface Card such as a Remote Direct Memory Access (RDMA) capable NIC) transfers data directly into or out of the memory of a peer device that is coupled to the NIC via one or more interconnects, bypassing a host computing/processing unit and/or main system memory. Other embodiments are also disclosed.
    Type: Application
    Filed: May 29, 2012
    Publication date: September 4, 2014
    Inventors: Mark S. Hefty, Robert J. Woodruff, Jerrie L. Coffman, William R. Margo
  • Publication number: 20140207896
    Abstract: The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer.
    Type: Application
    Filed: April 10, 2012
    Publication date: July 24, 2014
    Inventor: Mark S. Hefty
  • Publication number: 20140201306
    Abstract: The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred directly between memory buffers in networked devices without the need for substantial processing. While RDMA requires registration/deregistration for buffers that are not already preregistered, RDMA with reduced latency transfers information to intermediate buffers during registration/deregistration, utilizing time that would have ordinarily been wasted waiting for these processes to complete, and reducing the amount of information to transfer while the source buffer is registered. In this way the RDMA transaction may be completed more quickly. RDMA with reduced latency may be employed to expedite various information transactions. For example, RMDA with reduced latency may be utilized to stream information within a device, or may be used to transfer information for an information source external to the device directly to an application buffer.
    Type: Application
    Filed: April 10, 2012
    Publication date: July 17, 2014
    Inventor: Mark S. Hefty
  • Publication number: 20140129635
    Abstract: An embodiment includes a low-latency mechanism for performing a checkpoint on a distributed application. More specifically, an embodiment of the invention includes processing a first application on a compute node, which is included in a cluster, to produce first computed data and then storing the first computed data in volatile memory included locally in the compute node; halting the processing of the first application, based on an initiated checkpoint, and storing first state data corresponding to the halted first application in the volatile memory; storing the first state information and the first computed data in non-volatile memory included locally in the compute node; and resuming processing of the halted first application and then continuing the processing the first application to produce second computed data while simultaneously pulling the first state information and the first computed data from the non-volatile memory to an input/output (IO) node.
    Type: Application
    Filed: December 30, 2011
    Publication date: May 8, 2014
    Inventors: Mark S. Hefty, Arlin Davis, Robert Woodruff, Sayantan Sur, Shiow-wen Cheng
  • Publication number: 20130259033
    Abstract: Methods, systems, and apparatus for extending the size of Infiniband subnets using GID switching in an Infiniband fabric. An Infiniband subnet is defined to include multiple local identifier (LID) domains, each including multiple nodes interconnected via one or more LID switches. In turn, the LID domains are interconnected via one or more GID switches. Messages may be transferred between nodes in a given LID domain using LID switches in the domain. Messages may be transferred between nodes in separate LID domains by routing the messages via one or more GID switches. In various embodiments, GID switches may be implemented to also operate as LID switches and perform routing based on selected packet header fields.
    Type: Application
    Filed: August 23, 2011
    Publication date: October 3, 2013
    Inventor: Mark S. Hefty