Abstract: A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a first distance from one another, and the bit lines have center lines spaced by a second distance from one another, the second distance being less than the first distance. Three masking steps are required to manufacture the three layers of lines. Older-technology machinery and masks are used to form the two layers of word lines, and new-technology machinery and masks are used to manufacture the bit lines.

Abstract: An embodiment of the invention provides an on-chip heating system to both initially anneal and revive cycle-fatigued polymer ferroelectric materials utilized in memory devices. By heating the polymer ferroelectric material above its Curie temperature, the polymer ferroelectric material can crystallize as it cools. As such, the ferroelectric properties of the polymer are enhanced and/or restored.

Abstract: A memory circuit is provided with a spacer formed on a support surface and positioned adjacent to a first electrode surface of a first electrode. The memory circuit further includes a ferroelectric layer formed on the first electrode and the spacer.

Abstract: A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a first distance from one another, and the bit lines have center lines spaced by a second distance from one another, the second distance being less than the first distance. Three masking steps are required to manufacture the three layers of lines. Older-technology machinery and masks are used to form the two layers of word lines, and new-technology machinery and masks are used to manufacture the bit lines. As such, only 33% of the machinery has to be upgraded for manufacturing one multi-layer construction. The entire polymer memory has four multi-layer constructions having a total of 12 layers of lines, of which four layers require new-technology machinery. The multi-layer constructions are formed on underlying electronics.