Abstract: A zero or near zero IF frequency changer for use in a digital tuner comprises multipliers which receive the RF input signal from an input. The multipliers receive quadrature local oscillator signals from a first oscillator of an arrangement which comprises first and second phase-locked loops. The first phase-locked loop comprises a programmable divider, a comparator and a control loop so that the first oscillator is phase-locked to a second oscillator. A second phase-locked loop comprises the second oscillator and a synthesizer containing a reference oscillator to which the second oscillator is phase-locked. The output frequency of the second oscillator is in a frequency band which is outside the RF input frequency band of the frequency changer.

Abstract: An overvoltage protection circuit employs a series of semiconductor switching elements, each element having a control terminal and two main conduction terminals, in a totem pole configuration and two potential dividers whose tapping points feed, respectively, the control terminals and the main terminal junctions of the switching elements. Both the series of switching elements and the two potential dividers are connected between a reference node (zero volts) and a node to be protected from an electrostatic discharge. The resistive elements of the potential dividers are so arranged that, in the absence of a static discharge, all switching elements are cut off and experience a substantially equal voltage across the respective main terminals. In this way, the circuit may be usefully employed in integrated circuits which are based on a low-voltage integration process but which have also a high-voltage-supply rail (e.g. 30 V). The switching elements may be bipolar transistors, and preferably Darlington pairs.