Patents by Inventor Mark S. Lanus

Mark S. Lanus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150172162
    Abstract: A fault-tolerant failsafe computer voting system includes a switch module that generates a first copy of a first data packet and a second copy of the first data packet and that communicates the first copy and the second copy. The system also includes a first voting module that generates a first packet signature based on the first copy and communicates the first packet signature. The system further includes a second voting module that generates a second packet signature based on the second copy and communicates the second packet signature.
    Type: Application
    Filed: March 19, 2014
    Publication date: June 18, 2015
    Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.
    Inventors: Pasi Jukka Petteri VAANANEN, Martin Peter John CORNES, Mark S. LANUS
  • Publication number: 20150171893
    Abstract: A fault-tolerant failsafe computer system including an inter-processor communication channel includes a transmission control module that encodes a first data packet and communicates a first encoded copy of the first data packet and a second encoded copy of the first data packet. The system also includes a receiver control module that i) receives a first encoded copy of a second data packet and a second encoded copy of the second data packet and ii) decodes the first encoded copy and the second encoded copy. The system further includes a de-duplication module that receives a plurality of data packets and communicates at least one unique data packet of the plurality of data packets.
    Type: Application
    Filed: March 19, 2014
    Publication date: June 18, 2015
    Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.
    Inventors: Pasi Jukka Petteri VAANANEN, Mark S. LANUS, Martin Peter John CORNES
  • Publication number: 20090174256
    Abstract: A power distribution system and method may include a first power domain having a first plurality of power rails, a second power domain having a second plurality of power rails, where the first power domain is electrically independent of the second power domain, and a plurality of modules coupled to the first power domain and the second power domain, where each of the plurality of modules is coupled to one of the first plurality of power rails and one of the second plurality of power rails. The system may also include a plurality of mated pairs, where each of the plurality of modules is in only one of the plurality of mated pairs, and where each of the plurality of mated pairs is coupled to two separate of the first and second plurality of power rails.
    Type: Application
    Filed: July 1, 2008
    Publication date: July 9, 2009
    Applicant: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Mark S. Lanus, Bruce A. Hanahan, Wolfgang Poschenrieder
  • Patent number: 7542288
    Abstract: A chassis (300) for housing at least one cardcage (302) is disclosed. The chassis includes a first portion (420) of a chassis housing (300) through a sixth portion (460) thereof. The first through sixth portions forming a boundary around a storage region of the chassis housing (300). The chassis (300) also includes at least one air moving device (316). At least first (413) and second openings (425) are situated within the chassis housing (300). The first and (413) second openings (425) located at substantially different elevations relative to each other. A cardcage (302) is located in the storage region and situated in a skewed orientation relative to at least two of the portions of the chassis housing (300). The at least first (413) and second (425) openings and the at least one air moving device (316) are located relative to the skewed oriented cardcage (302) to facilitate airflow thereacross.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: June 2, 2009
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventor: Mark S. Lanus
  • Publication number: 20080285233
    Abstract: A chassis (300) for housing at least one cardcage (302) is disclosed. The chassis includes a first portion (420) of a chassis housing (300) through a sixth portion (460) thereof. The first through sixth portions forming a boundary around a storage region of the chassis housing (300). The chassis (300) also includes at least one air moving device (316). At least first (413) and second openings (425) are situated within the chassis housing (300). The first and (413) second openings (425) located at substantially different elevations relative to each other. A cardcage (302) is located in the storage region and situated in a skewed orientation relative to at least two of the portions of the chassis housing (300). The at least first (413) and second (425) openings and the at least one air moving device (316) are located relative to the skewed oriented cardcage (302) to facilitate airflow thereacross.
    Type: Application
    Filed: May 16, 2007
    Publication date: November 20, 2008
    Applicant: MOTOROLA, INC.
    Inventor: Mark S. Lanus
  • Publication number: 20080218987
    Abstract: A subrack having a front side and a rear side, wherein the subrack is coupled to receive an Advanced Mezzanine Card module, the subrack includes a monolithic backplane having a first portion and second portion, where the first portion runs substantially along the front side and the second portion runs substantially along the rear side. A first slot is to receive the Advanced Mezzanine Card module inserted via the front side and connect the Advanced Mezzanine Card module directly to the second portion of the monolithic backplane. A second slot is to receive the Advanced Mezzanine Card module inserted via the rear side and connect the Advanced Mezzanine Card module directly to the first portion of the monolithic backplane.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 11, 2008
    Applicant: Emerson Network Power-Embedded Computing, Inc.
    Inventors: Mark S. Lanus, Bruce A. Hanahan, Wolfgang Poschenrieder
  • Publication number: 20080186672
    Abstract: A computer system includes a cooling module that cools an embedded computer chassis. The cooling module includes a fan and a fan controller that controls the fan speed based on a first signal that represents a desired speed of the fan. A bus master module generates the first signal, generates a second signal that bypasses the fan controller and selectively switches the fan to a full-speed, receives a third signal that indicates an actual speed of the fan, communicates the second signal to switch the fan to full-speed, monitors the third signal to determine if the fan speed changed due to the second signal, and indicates a latent fault if the change in the fan speed is not detected.
    Type: Application
    Filed: April 8, 2008
    Publication date: August 7, 2008
    Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.
    Inventor: Mark S. Lanus
  • Patent number: 7394169
    Abstract: A power distribution system and method may include a first power domain having a first plurality of power rails, a second power domain having a second plurality of power rails, where the first power domain is electrically independent of the second power domain, and a plurality of modules coupled to the first power domain and the second power domain, where each of the plurality of modules is coupled to one of the first plurality of power rails and one of the second plurality of power rails. The system may also include a plurality of mated pairs, where each of the plurality of modules is in only one of the plurality of mated pairs, and where each of the plurality of mated pairs is coupled to two separate of the first and second plurality of power rails.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: July 1, 2008
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Mark S. Lanus, Bruce A. Hanahan, Wolfgang Poschenrieder
  • Publication number: 20080113604
    Abstract: An embedded computer chassis may include a fan tray receptacle adapted to receive at least one primary fan tray, where the at least one primary fan tray is adapted to be non-redundant in providing cooling air to the embedded computer chassis. Embedded computer chassis may also include a cooling air plenum, where the cooling air plenum is adapted to receive a service fan tray, where the service fan tray is adapted to temporarily provide the cooling air to the embedded computer chassis absent the at least one primary fan tray.
    Type: Application
    Filed: October 10, 2006
    Publication date: May 15, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Robert C. Tufford, Mark S. Lanus
  • Patent number: 7373278
    Abstract: A method of latent fault checking a cooling module of an embedded computer chassis may include prior to detection of an active fault in the cooling module, performing a fan controller latent fault checking algorithm and a full-speed latent fault checking algorithm. The fan controller latent fault checking algorithm may include attempting to modify a fan speed in the cooling module via a fan controller module in the cooling module, and determining if a change in the fan speed is detected. The full-speed latent fault checking algorithm may include attempting to modify the fan speed via a full speed fan control circuit, bypassing the fan controller module, and determining if the change in the fan speed is detected. If the change in the fan speed is not detected in at least one of the fan controller latent fault checking algorithm and the full-speed latent fault checking algorithm, a latent fault in the cooling module of the embedded computer chassis may be indicated.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: May 13, 2008
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventor: Mark S. Lanus
  • Patent number: 7242578
    Abstract: A bladed architecture, backplane-based network (100) having N payload slots (108) includes an N/2 slot switch module (102), wherein the N/2 slot switch module is reconfigurable to one of a left-hand slot switch configuration (603) and a right-hand slot switch configuration (605), and wherein the N/2 slot switch module is coupled to N/2 of the N payload slots such that the bladed architecture, backplane-based network is in a sub-optimal configuration (601).
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: July 10, 2007
    Assignee: Motorola, Inc.
    Inventors: Douglas L. Sandy, Mark S. Lanus, Robert C. Tufford
  • Patent number: 7141893
    Abstract: A power distribution system and method may include a first power domain having a first plurality of power rails, a second power domain having a second plurality of power rails, where the first power domain is electrically independent of the second power domain, and a plurality of modules coupled to the first power domain and the second power domain, where each of the plurality of modules is coupled to a unique set of one of the first plurality of power rails and one of the second plurality of power rails. The system may also include a plurality of mated pairs, where each of the plurality of modules is in only one of the plurality of mated pairs, where each of the plurality of mated pairs is coupled to four separate of the first and second plurality of power rails, and where each of the plurality of mated pairs is coupled to a unique set of the first plurality of power rails and the second plurality of power rails.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: November 28, 2006
    Assignee: Motorola, Inc.
    Inventors: Bruce A. Hanahan, Mark S. Lanus, Edward P. Sayre
  • Publication number: 20040233652
    Abstract: A bladed architecture, backplane-based network (100) having N payload slots (108) includes an N/2 slot switch module (102), wherein the N/2 slot switch module is reconfigurable to one of a left-hand slot switch configuration (603) and a right-hand slot switch configuration (605), and wherein the N/2 slot switch module is coupled to N/2 of the N payload slots such that the bladed architecture, backplane-based network is in a sub-optimal configuration (601).
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Inventors: Douglas L. Sandy, Mark S. Lanus, Robert C. Tufford
  • Publication number: 20040233856
    Abstract: A bladed architecture, backplane-based network (100) having N payload slots (108) includes an N/2 slot switch module (102), wherein the N/2 slot switch module is reconfigurable to one of a left-hand slot switch configuration (603) and a right-hand slot switch configuration (605), and wherein the N/2 slot switch module is coupled to N/2 of the N payload slots such that the bladed architecture, backplane-based network is in a sub-optimal configuration (601).
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Inventors: Mark S. Lanus, Douglas L. Sandy, Robert C. Tufford
  • Publication number: 20040236867
    Abstract: A bladed architecture, backplane-based network (100) having N payload slots (108) includes an N/2 slot switch module (102), wherein the N/2 slot switch module is reconfigurable to one of a left-hand slot switch configuration (603) and a right-hand slot switch configuration (605), and wherein the N/2 slot switch module is coupled to N/2 of the N payload slots such that the bladed architecture, backplane-based network is in a sub-optimal configuration (601).
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Inventors: Mark S. Lanus, Douglas L. Sandy, Robert C. Tufford
  • Patent number: 6374340
    Abstract: A method of managing memory includes providing a memory (190) partitioned into a memory tree having N memory levels and different numbers of memory nodes (100, 110, 111, 120, 121, 122, 123, 130, 131, 132, 133, 134, 135, 136, 137) at each of the memory levels, providing a memory request, determining a memory request size, recursively searching partially-full subtrees within the memory tree to identify an empty one of the memory nodes minimizing fragmentation within the memory tree, and allocating the memory request to the empty one of the memory nodes.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: April 16, 2002
    Assignee: Motorola, Inc.
    Inventors: Mark S. Lanus, Mark P. Huth
  • Patent number: 5084825
    Abstract: A process control system is disclosed in which process variables are treated as mapped in n-dimensional space, where n is the number of orthogonal directions. Three functions, set, check, and term, provide the link between expected and actual conditions. The check and term functions operate on orthogonal coordinates. Each parameter has a guard band to provide a soft boundary for the parameter.
    Type: Grant
    Filed: March 7, 1988
    Date of Patent: January 28, 1992
    Assignee: BCT Spectrum Inc.
    Inventors: John H. Kelly, Mark S. Lanus