Patents by Inventor Mark S. Shipman

Mark S. Shipman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6125236
    Abstract: A computer system for providing user control of multimedia output parameters. The computer system includes a central processing unit (CPU) coupled to a memory unit. The memory unit includes a system management mode (SMM) memory and a main memory. The SMM memory is not mapped as part of the main memory and includes a prestored interrupt processing program. The interrupt processing program includes multimedia parameter control functions that provide a user with control of the output of multimedia parameters. The computer system further includes an input means for a user to generate multimedia parameter control requests, and an interrupt triggering means for detecting the multimedia parameter control request and in response issues an interrupt to the CPU. In response to the interrupt, the CPU interrupts execution, stores the current system state data of the computer system into the SMM memory, and starts execution of the interrupt processing program to service the multimedia parameter control functions.
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: September 26, 2000
    Assignee: Intel Corporation
    Inventors: Rayi Nagaraj, Mark S. Shipman
  • Patent number: 6041385
    Abstract: A method and apparatus for protecting data using lock values in a computer system includes indicating that the computer system does not support locked accesses to the data. However, upon receipt of a request to write to the storage area where the data is contained, the present invention checks whether a lock value corresponding to the request matches a predetermined lock value. If the lock value matches the predetermined lock value, then the data is written to the storage area; otherwise, the storage area is left unmodified.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: March 21, 2000
    Assignee: Intel Corporation
    Inventors: Mark S. Shipman, Orville H. Christeson, Timothy E. W. Labatte
  • Patent number: 5913057
    Abstract: A request is received from a caller to perform a read of data from a storage area of a computer system, the data having master header data in a header portion. The master header data is replaced with alternate header data before returning the data to the caller. The data, including the alternate header data, is returned to the caller. A request is received from the caller to perform a write of caller data to the storage area, the caller data having caller header data in a header portion of the caller data. The write of caller data is allowed only if the caller header data is identical to the master header data.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: June 15, 1999
    Assignee: Intel Corporation
    Inventors: Timothy E. W. Labatte, Orville H. Christeson, Mark S. Shipman
  • Patent number: 5909592
    Abstract: A method of recognizineg peripheral devices coupled to an interface such as an Integrated Device Electronics interface provides a logically sequential addressing scheme for peripheral devices that may not have physically contiguous or sequential addresses. The method enables operating systems that otherwise only support sequentially ordered drives to support access to devices coupled to the interface in any order. The method includes the step of copying a basic input/output (BIOS) device configuration table and a (BIOS) device parameter table into memory. The existence of any device coupled to the interface is tested using every physical device identifier supported by the size of the device configuration table.
    Type: Grant
    Filed: April 1, 1997
    Date of Patent: June 1, 1999
    Assignee: Intel Corporation
    Inventor: Mark S. Shipman
  • Patent number: 5901311
    Abstract: A status parameter is set for a storage area of a computer system to a read-only status. An access key is received from an access key call by a caller. The status parameter is changed to a write-permissible status if the access key matches a master access key. A request to perform a write to the storage area is received, and the write is allowed only if the status parameter has been set to the write-permissible status. The status parameter is reset to the read-only status after the write is performed.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: May 4, 1999
    Assignee: Intel Corporation
    Inventors: Timothy E. W. Labatte, Orville H. Christeson, Mark S. Shipman
  • Patent number: 5901285
    Abstract: A request to erase a storage area of a computer system is received via an erase call by a caller, the erase call containing an erasure key. The storage area is erased only if the erasure key matches a master erasure key corresponding to the storage area. A request is received to perform a write to the storage area, and the write is allowed only if the storage area has been erased.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: May 4, 1999
    Assignee: Intel Corporation
    Inventors: Timothy E. W. Labatte, Orville H. Christeson, Mark S. Shipman
  • Patent number: 5881282
    Abstract: A computer system is programmed with basic input/output services (BIOS), including an initialization service, and an associated virtual mode execution monitor. The initialization service scans for option ROMs of add-on devices at power on/reset. For each detected option ROM, the initialization service creates the runtime definition of its initialization task, setting up the initialization task to be executed in a virtual mode, redirecting all interrupts and exceptions arisen during execution of the initialization task to the virtual mode execution monitor. For each redirected interrupt/exception, the virtual mode execution monitor either allows the triggering attempted operation to be performed, or substitutes an impermissible triggering attempted operation with one or more fail safe recovery operations, or simply terminates the "ill-behaving" initialization task.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: March 9, 1999
    Assignee: Intel Corporation
    Inventor: Mark S. Shipman
  • Patent number: 5852736
    Abstract: A method and apparatus for protecting data using lock values in a computer system includes indicating that the computer system does not support locked accesses to the data. However, upon receipt of a request to write to the storage area where the data is contained, the present invention checks whether a lock value corresponding to the request matches a predetermined lock value. If the lock value matches the predetermined lock value, then the data is written to the storage area; otherwise, the storage area is left unmodified.
    Type: Grant
    Filed: March 28, 1996
    Date of Patent: December 22, 1998
    Assignee: Intel Corporation
    Inventors: Mark S. Shipman, Orville H. Christeson, Timothy E. W. Labatte
  • Patent number: 5704035
    Abstract: A method and apparatus in a personal computer for performing a basic input/output system (BIOS) power on system test (POST) that uses three data patterns. The first data pattern (plus Inverse pattern) is used to test data bit integrity. the second data pattern (plus inverse pattern) encoded by address is used to test address line integrity. The third pattern is a pattern where all bits are null. Each pattern is 64 bits wide (a 32 bit data pattern plus 32 bit inverse data pattern). The test uses the Processor or Main Memory Controller's Byte Enables to speed the execution of the test. This is optimized for both 32 and 64 bit data paths. The invention has the advantage that it uses a 64 Bit data test, finds Data Bit and Address Line failures, tests boundary conditions rather than every data point, and results in very fast execution.
    Type: Grant
    Filed: July 3, 1996
    Date of Patent: December 30, 1997
    Assignee: Intel Corporation
    Inventor: Mark S. Shipman
  • Patent number: 5671413
    Abstract: The services to be provided by a basic input/output system (BIOS) of a computer system are implemented via a number of independently executable service components. Additionally, the BIOS is provided with a decompression dispatcher for decompressing and dispatching the service components into random access memory (RAM) of the computer system for execution on an as needed basis, and optionally removing the dispatched service components when they are no longer needed. As a result, the service components may be stored in a non-volatile storage in a compressed state, allowing more services to be implemented without requiring more non-volatile storage.
    Type: Grant
    Filed: October 31, 1994
    Date of Patent: September 23, 1997
    Assignee: Intel Corporation
    Inventors: Mark S. Shipman, Orville Christeson