Patents by Inventor Mark Schuelein

Mark Schuelein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Logic with state retentive sleep mode
    Patent number: 7649385
    Abstract: Embodiments disclosed herein provide sleep mode solutions for retaining state information while reducing power in a logic block.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: January 19, 2010
    Assignee: Intel Corporation
    Inventors: Aurobindo Dasgupta, Mark Schuelein
  • Ultra-drowsy circuit
    Publication number: 20060244493
    Abstract: Method and apparatus for an ultra-drowsy circuit for use in lower power operational modes are described.
    Type: Application
    Filed: June 30, 2006
    Publication date: November 2, 2006
    Inventor: Mark Schuelein
  • Scan enabled storage device
    Publication number: 20050289417
    Abstract: A scan enabled storage device includes two storage elements and two input circuits. A data input circuit accepts a data signal, a clock signal, and a scan enable signal to inhibit the operation of the clock signal. A scan data input circuit accepts a scan data signal and a scan clock signal.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 29, 2005
    Inventor: Mark Schuelein
  • Ultra-drowsy circuit
    Publication number: 20050285651
    Abstract: Method and apparatus for an ultra-drowsy circuit for use in lower power operational modes are described.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 29, 2005
    Inventor: Mark Schuelein
  • Apparatus and circuit having reduced leakage current and method therefor
    Publication number: 20050017308
    Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage generator that selectively increases the voltage potential on the channel region of a transistor relative to the source region of the transistor. The voltage potential may be provided to a diffusion region in the well regions with transistors.
    Type: Application
    Filed: August 24, 2004
    Publication date: January 27, 2005
    Inventor: Mark Schuelein