Patents by Inventor Mark Shutt

Mark Shutt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11068278
    Abstract: An information handling system includes a dual in-line memory module (DIMM) coupled to a memory controller via a memory channel. A processor during a first in time boot process of the information handling system determines a first environmental condition of the information handling system, and initializes the memory controller and the DIMM to determine a first set of initialization parameters for the memory controller and the DIMM. During a second in time boot process of the information handling system, the processor determines if a second environmental condition is different than the first environmental condition, if the second environmental condition is not different then to continue the second in time boot process without initializing the memory controller and the DIMM, and if the second environmental condition is different then to initialize the memory controller and the DIMM to determine a second set of initialization parameters for the memory controller and the DIMM.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: July 20, 2021
    Assignee: Dell Products L.P.
    Inventors: Mark Shutt, Wei G Liu, Quy Hoang, Andy Butcher
  • Patent number: 11016835
    Abstract: An information handling system includes a dual in-line memory module (DIMM) coupled to a memory controller. The memory controller provides interrupts to a processor each time a read transaction from the DIMM results in a correctable read error. The processor instantiates a failure predictor that receives the interrupts, accumulates a count of the interrupts, and provides an error indication when the count exceeds an error threshold. In accumulating the count, the failure predictor increments the count each time the predictor receives a particular interrupt and decrements the count in accordance with an error leak rate. The error leak rate has a first value when a training coefficient for the DIMM is greater than a deviation threshold, and has a second value when the training coefficient for the DIMM is less than the deviation threshold.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: May 25, 2021
    Assignee: Dell Products L.P.
    Inventors: Quy Hoang, Wei G Liu, Andy Butcher, Mark Shutt
  • Publication number: 20210117206
    Abstract: An information handling system includes a dual in-line memory module (DIMM) coupled to a memory controller via a memory channel. A processor during a first in time boot process of the information handling system determines a first environmental condition of the information handling system, and initializes the memory controller and the DIMM to determine a first set of initialization parameters for the memory controller and the DIMM. During a second in time boot process of the information handling system, the processor determines if a second environmental condition is different than the first environmental condition, if the second environmental condition is not different then to continue the second in time boot process without initializing the memory controller and the DIMM, and if the second environmental condition is different then to initialize the memory controller and the DIMM to determine a second set of initialization parameters for the memory controller and the DIMM.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Inventors: Mark Shutt, Wei G Liu, Quy Hoang, Andy Butcher
  • Publication number: 20210117257
    Abstract: An information handling system includes a dual in-line memory module (DIMM) coupled to a memory controller. The memory controller provides interrupts to a processor each time a read transaction from the DIMM results in a correctable read error. The processor instantiates a failure predictor that receives the interrupts, accumulates a count of the interrupts, and provides an error indication when the count exceeds an error threshold. In accumulating the count, the failure predictor increments the count each time the predictor receives a particular interrupt and decrements the count in accordance with an error leak rate. The error leak rate has a first value when a training coefficient for the DIMM is greater than a deviation threshold, and has a second value when the training coefficient for the DIMM is less than the deviation threshold.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Inventors: Quy Hoang, Wei G Liu, Andy Butcher, Mark Shutt