Patents by Inventor Mark Slutz

Mark Slutz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110022736
    Abstract: Methods and systems for automatically, dynamically reconfiguring multiplexing functions of a PHY of a SAS device in response to monitored performance of the PHY and/or in response to changes in configuration of devices in the SAS domain. A SAS device such as a SAS initiator or a SAS expander in a SAS domain may monitor performance of PHYs of the device to detect bandwidth utilization and may reconfigure multiplexing functions of a PHY to improve bandwidth utilization of the PHYs of the device. The device may also detect changes in the topology of the SAS domain such as addition of new devices or removal of device and adjust multiplexing functions of its PHYs accordingly to improve performance of communications in the SAS domain.
    Type: Application
    Filed: July 21, 2009
    Publication date: January 27, 2011
    Applicant: LSI CORPORATION
    Inventors: David T. Uddenberg, Mark Slutz, Brian J. Varney
  • Patent number: 7738366
    Abstract: Methods and structures within a SAS expander for detecting link level errors in PHYs of a SAS expander to reduce overhead bandwidth utilization of SAS links between SAS initiators and SAS expanders. In one aspect hereof, a SAS expander self monitors the error status registers of its own PHYs over an internal path that does not use bandwidth of the attached SAS links. When a link level error is so detected the SAS expander may initiate actions and/or report the error to a SAS initiator to thereby reduce the potential for lost data integrity. Where multiple SAS expanders are configured in a SAS domain fabric, each expander may monitor its PHYs or one expander may be designated a master and monitor PHYs of all expanders in the fabric.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: June 15, 2010
    Assignee: LSI Corporation
    Inventors: David T. Uddenberg, Mark Slutz, Brian J. Varney
  • Patent number: 7412631
    Abstract: Methods and structures within a SAS expander for testing SAS devices and other SAS expanders in the SAS domain. Testing devices and expanders in the domain by operations performed within a SAS expander in the domain relieves the burden of such processing in attached host systems and adds flexibility for scheduling processing for test operation of devices and expanders in the domain. In one aspect hereof, the testing may be performed by a master SAS expander configured in the domain. The SAS expander may initiate testing of devices following completion of the SAS discovery process. Testing may also be initiated in response to events in the SAS domain not typically detected by attached host systems.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: August 12, 2008
    Assignee: LSI Corporation
    Inventors: David T. Uddenberg, Mark Slutz, Brian J. Varney
  • Patent number: 7401171
    Abstract: Methods and structures within a SAS expander for initiating communication with one or more SAS initiators in a SAS domain to inform the initiators of sensed changes in the domain without the need for a full SAS Discovery process. In one aspect hereof, the expander may transmit a vendor unique BROADCAST primitive to inform SAS initiators that they should initiate a vendor unique SMP or SSP exchange with the expander to determine changes to the SAS domain. In another aspect hereof, the SAS initiator may respond as an SMP or SSP target device in response to initiation of vendor unique SMP or SSP exchanges by the expander. The expander may report to initiators regarding sensed changes in the domain and/or statistics regarding operation of the expander or other elements of the domain.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: July 15, 2008
    Assignee: LSI Corporation
    Inventors: Mark Slutz, David T. Uddenberg, Brian J. Varney
  • Patent number: 7366957
    Abstract: The present invention is a method and system for providing a complete validation of an initiator and target within bus architecture. A target's behavior may be controlled by an initiator. Control of the target may be through execution of initiator commands including vendor unique commands relating to desired characteristics for testing. The initiator's response to the target's behavior may be verified due to the handshaking communication protocol between a target and initiator. Additionally, by altering the behavior of the target to test initiator response, a target's behavior is also validated.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: April 29, 2008
    Assignee: LSI Corporation
    Inventors: Erik Paulsen, Carl Gygi, Mark Slutz
  • Patent number: 7290066
    Abstract: Methods and associated structure for utilizing multiple ports or PHYs comprising a SAS wide port to improve transmission bandwidth utilization for a single large I/O request. In one aspect hereof, a large I/O request is broken into a plurality of smaller I/O requests to be distributed over multiple PHYs or ports of a configured wide SAS port. The number of smaller I/O requests may be any number up to the maximum number of PHYs or ports comprising the SAS wide port. In another aspect hereof, the size of a large I/O request may be compared against a threshold value to determine whether the large request should be broken into smaller requests. The threshold value may be determined in accordance with features and aspects hereof either statically or dynamically based on workloads assigned to, and utilization of, the configured SAS wide port.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: October 30, 2007
    Assignee: LSI Corporation
    Inventors: William Voorhees, Mark Slutz, David Uddenberg
  • Publication number: 20070100847
    Abstract: Methods and structures within a SAS expander for initiating communication with one or more SAS initiators in a SAS domain to inform the initiators of sensed changes in the domain without the need for a full SAS Discovery process. In one aspect hereof, the expander may transmit a vendor unique BROADCAST primitive to inform SAS initiators that they should initiate a vendor unique SMP or SSP exchange with the expander to determine changes to the SAS domain. In another aspect hereof, the SAS initiator may respond as an SMP or SSP target device in response to initiation of vendor unique SMP or SSP exchanges by the expander. The expander may report to initiators regarding sensed changes in the domain and/or statistics regarding operation of the expander or other elements of the domain.
    Type: Application
    Filed: October 31, 2005
    Publication date: May 3, 2007
    Inventors: Mark Slutz, David Uddenberg, Brian Varney
  • Publication number: 20070093124
    Abstract: Methods and structures within a SAS expander for monitoring bandwidth utilization of a SAS wide port associated with the expander and for effecting reconfiguration of the wide port to improve SAS domain performance. In one aspect, a SAS expander may monitor utilization of a wide port of the expander. If the wide port is over-utilized, the expander may inform a SAS initiator of the need for one or more additional links to be configured in the wide port. If the wide port is under-utilized, the expander may reconfigure the wide port by disabling a link to reduce power consumption associated with that link. If the wide port is later over-utilized, a previously disabled link may be re-enabled by the expander to restore available bandwidth. Disabled links of a wide port may also be reported to a SAS initiator to be reconfigured by the initiator for use in another communication path.
    Type: Application
    Filed: October 20, 2005
    Publication date: April 26, 2007
    Inventors: Brian Varney, David Uddenberg, Mark Slutz
  • Patent number: 7210065
    Abstract: Improved methods and structures for testing of SAS components, in situ, in a SAS domain. A first SAS component is adapted to generate stimuli such as error conditions to elicit a response to the error condition from a second SAS component coupled to the first in the intended SAS domain configuration. In one aspect, a SAS device controller generates stimuli applied to a SAS expander coupled thereto and verifies proper response from the SAS expander. In another aspect, a SAS expander generates stimuli applied to a SAS device controller coupled thereto and verifies proper response from the SAS device controller. Stimuli may be generated by custom circuits or firmware/software within the first component. Vendor specific SAS SMP transactions may be used to cause the first component to enter the special verification mode.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: April 24, 2007
    Assignee: LSI Logic Corporation
    Inventors: David Uddenberg, William Voorhees, Mark Slutz
  • Publication number: 20070070885
    Abstract: Methods and structures within a SAS expander for detecting link level errors in PHYs of a SAS expander to reduce overhead bandwidth utilization of SAS links between SAS initiators and SAS expanders. In one aspect hereof, a SAS expander self monitors the error status registers of its own PHYs over an internal path that does not use bandwidth of the attached SAS links. When a link level error is so detected the SAS expander may initiate actions and/or report the error to a SAS initiator to thereby reduce he potential for lost data integrity. Where multiple SAS expanders are configured in a SAS domain fabric, each expander may monitor its PHYs or one expander may be designated a master and monitor PHYs of all expanders in the fabric.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 29, 2007
    Inventors: David Uddenberg, Mark Slutz, Brian Varney
  • Publication number: 20070061632
    Abstract: Methods and structures within a SAS expander for testing SAS devices and other SAS expanders in the SAS domain. Testing devices and expanders in the domain by operations performed within a SAS expander in the domain relieves the burden of such processing in attached host systems and adds flexibility for scheduling processing for test operation of devices and expanders in the domain. In one aspect hereof, the testing may be performed by a master SAS expander configured in the domain. The SAS expander may initiate testing of devices following completion of the SAS discovery process. Testing may also be initiated in response to events in the SAS domain not typically detected by attached host systems.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 15, 2007
    Inventors: David Uddenberg, Mark Slutz, Brian Varney
  • Patent number: 7084618
    Abstract: A system and method for testing the signals on a parallel communication bus uses a single printed circuit board that connects to the bus. The signals from the bus may be passively and actively filtered prior to a multiplexer. The multiplexer may be controlled by a variety of inputs, including communications over a second bus by a remote device. The output of the multiplexer is one or more probe points that may be connected to a measurement device.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: August 1, 2006
    Assignee: LSI Logic Corporation
    Inventors: William Voorhees, William Schmitz, Mark Slutz
  • Patent number: 7000170
    Abstract: A method and apparatus for generating a CRC (cyclic redundancy check)/parity error in network environment. A SCSI (small computer systems interface) bus expander such as an Ultra320 bus expander or the like is added between a sending device and a receiving device. The sending device-receiving device pair may execute a training session to determine the skew compensation. During the training session, the SCSI bus expander may figure out timing differences due to skew and adjusts the timing of each data signal to compensate for skew. For each data signal, a compensated time may be obtained. The compensated time may then be modified through a JTAG (Joint Test Action Group) port of the SCSI bus expander. The compensated times may be adjusted such that a CRC/parity error is generated on every I/O (input/output) or just some I/Os to the receiving device.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: February 14, 2006
    Assignee: LSI Logic Corporation
    Inventors: Mark Slutz, William Schmitz, Erik Paulsen
  • Patent number: 6986083
    Abstract: A method for data verification in a data storage environment including the steps of (A) sending a command from an initiator to a target, where the command defines an expected data pattern, (B) sending a block write command from the initiator to the target, where the write command initiates sending data from the initiator to the target, (C) comparing data received to the expected data pattern and (D) generating a status indication in response to the comparison.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: January 10, 2006
    Assignee: LSI Logic Corporation
    Inventors: Carl E. Gygi, Mark A. Slutz, Stuart L. Nuffer
  • Publication number: 20050210159
    Abstract: Methods and associated structure for utilizing multiple ports or PHYs comprising a SAS wide port to improve transmission bandwidth utilization for a single large I/O request. In one aspect hereof, a large I/O request is broken into a plurality of smaller I/O requests to be distributed over multiple PHYs or ports of a configured wide SAS port. The number of smaller I/O requests may be any number up to the maximum number of PHYs or ports comprising the SAS wide port. In another aspect hereof, the size of a large I/O request may be compared against a threshold value to determine whether the large request should be broken into smaller requests. The threshold value may be determined in accordance with features and aspects hereof either statically or dynamically based on workloads assigned to, and utilization of, the configured SAS wide port.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 22, 2005
    Inventors: William Voorhees, Mark Slutz, David Uddenberg
  • Publication number: 20050204197
    Abstract: Improved methods and structures for testing of SAS components, in situ, in a SAS domain. A first SAS component is adapted to generate stimuli such as error conditions to elicit a response to the error condition from a second SAS component coupled to the first in the intended SAS domain configuration. In one aspect, a SAS device controller generates stimuli applied to a SAS expander coupled thereto and verifies proper response from the SAS expander. In another aspect, a SAS expander generates stimuli applied to a SAS device controller coupled thereto and verifies proper response from the SAS device controller. Stimuli may be generated by custom circuits or firmware/software within the first component. Vendor specific SAS SMP transactions may be used to cause the first component to enter the special verification mode.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 15, 2005
    Inventors: David Uddenberg, William Voorhees, Mark Slutz
  • Publication number: 20050177773
    Abstract: A method, system, and computer readable medium varies parameter data for a device under test. Parameters may be successively retrieved and set to a specified or random value. A state machine for operating, testing, and/or simulating a device under test using common code that is function specific. The state machine is built through inputting parameter information into the common code. Each state of the state machine has a unique set of parameters that define the state of the machine at that state. Pointers and status functions are preferably used to build and maintain the state machine.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 11, 2005
    Inventors: Andrew Hadley, David So, Mark Slutz
  • Publication number: 20050134163
    Abstract: A system and method for testing the signals on a parallel communication bus uses a single printed circuit board that connects to the bus. The signals from the bus may be passively and actively filtered prior to a multiplexer. The multiplexer may be controlled by a variety of inputs, including communications over a second bus by a remote device. The output of the multiplexer is one or more probe points that may be connected to a measurement device.
    Type: Application
    Filed: December 8, 2003
    Publication date: June 23, 2005
    Inventors: William Voorhees, William Schmitz, Mark Slutz
  • Patent number: 6895365
    Abstract: Systems and methods for analyzing data transferred through an SPI data bus are presented. In one exemplary preferred embodiment of the invention, an SPI data probe imitates an SPI device coupled to the SPI data bus and receives data from the SPI data bus so that the data may be analyzed. The SPI data probe transfers the data to an analysis unit without substantially altering impedance more than the SPI device would. The SPI data probe includes connectors configured for coupling the probe to the SPI data bus and for coupling the probe to an analysis unit. The SPI data probe also includes circuitry that may buffer, compensate and deskew the data as an SPI device would.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: May 17, 2005
    Assignee: LSI Logic Corporation
    Inventors: William W. Voorhees, William J. Schmitz, Mark A. Slutz
  • Patent number: 6892334
    Abstract: Disclosed is a method for automatically testing the deskew setting for the clock in a parallel data interface. The deskew value is varied to a high and a low limit to the point where errors occur when transmissions occur. After determining the high and low operable limits of the deskew values, an optimum deskew setting may be determined and set for the system. The present invention may be used as a design verification technique, for optimizing a system after integration, or for further optimization of the deskew value after performing a training pattern for optimizing transmission performance.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: May 10, 2005
    Assignee: LSI Logic Corporation
    Inventors: Mark Slutz, William Schmitz, David So