Abstract: Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.

Abstract: Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.

Abstract: Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.

Abstract: Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.

Abstract: Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.

Abstract: Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.

Abstract: An automated system and method for processing prescription requests is disclosed, whereby a patient or physician enters a prescription request to an automated pharmacy prescription processing system. For example, a request for a new or refill prescription can be transmitted from a physician's office to the prescription processing system as a digital file or facsimile message, or using keypad or voice commands in an Interactive Voice Response (IVR) system running in the prescription processing system. A request for a prescription refill can also be entered by a patient using an IVR system, or the patient can physically carry the refill prescription request to a pharmacy for entry to the prescription processing system by a technician. The automated pharmacy system determines whether the new or refill prescription request can be filled by a central fill inventory.

Abstract: A method and system for prescription management is described. At least one prescription is received at a pharmacy and an order associated with at least one of the prescriptions is generated. A shipping location associated with the order is determined and the order is communicated to a central fill facility for filling the prescriptions associated with the order. A cost associated with the order is received from the central fill facility. The cost includes a shipping cost and an order cost. Payment is settled for the order based on the cost.

Abstract: A method for prescription fulfillment is described. A prescription of a prescribed drug for a patient is received at a pharmacy designated by the patient. While maintaining the prescription at the designated pharmacy, the prescription is filled with the prescribed drug at a remote third-party facility for delivery of the drug to a location designated by the patient on behalf of, but independent of, the designated pharmacy.

Abstract: A method for efficiently storing quantities used by the Fast Multipole Method (FMM) to perform field calculations is disclosed. This method takes advantage of the level structure used by the FMM. The disclosed method selects a particular level and, for each group in that level, calculates interactions with all far groups. The disclosed method does not repeat calculations for interaction of a similar distance for the same level. Rather, it references calculations previously made for the similar interaction, thereby eliminating the calculation and storage of information that is the same as information previously calculated and stored.

Abstract: A scalable parallel processing method and apparatus for performing fast multipole method (FMM) scattering calculations. The processing method is preferably implemented on a parallel multi-processor wherein a plurality of processors communicate with each other via a data communications network. The multiple processors work in tandem to solve a particular problem, which in the disclosed embodiment involves simulating an object (or scatterer) mathematically by using the fast multipole method (FMM) to calculate scattering amplitudes. The present invention provides a method and apparatus that organizes and carries out FMM operations in a manner that minimizes or eliminates the effect of time spent on sharing information between processors. According to the present invention, the method, essentially masks certain FMM information sharing tasks by performing them concurrently with other FMM computational tasks.

Abstract: Testing apparatus for assembled printed circuit boards to assure that all the component values are correct and that all the components have been correctly inserted into the board. The testing apparatus performs its testing function without the need for physical guarding, and it operates on node oriented complex-Valued Admittance measurements. The testing apparatus includes a computer which translates the measurements into component data by solving only linear equations.