Abstract: An example data recorder includes a field programmable gate array (FPGA) operably coupled to a power system simulator where the FPGA is configured to record an output of the power system simulator to a data file. The example data recorder further includes a server operably coupled to the field programmable gate array, where the server is configured to receive the data file from the FPGA and store the data file. An example system for analyzing a power system includes a power system simulator, an FPGA operably coupled to the power system simulator, the FPGA configured to record an output of the power system simulator to a data file, and a server operably coupled to the field programmable gate array; where server is configured to receive the data file from the FPGA and store the data file.

Abstract: A controller hardware in the loop (CHIL) interface is disclosed. The CHIL interface comprises software and hardware that redirects a signal flow, including modulation signals and measurements exchanged between controller logic and a power electronics converter (PEC), to a CHIL port. Accordingly, the CHIL port provides access to the controller logic, at a digital level, throughout phases of the controller's lifetime (i.e., design, installation, maintenance, upgrade). Thus, the CHIL interface facilitates the use of PEC simulators for testing. The CHIL interface can detach the actual PEC from the control logic so testing can be performed with or without an operating PEC and can avoid the need for dedicated and error prone signal conditioning circuitry that is external to the controller.

Abstract: A controller hardware in the loop (CHIL) interface is disclosed. The CHIL interface comprises software and hardware that redirects a signal flow, including modulation signals and measurements exchanged between controller logic and a power electronics converter (PEC), to a CHIL port. Accordingly, the CHIL port provides access to the controller logic, at a digital level, throughout phases of the controller's lifetime (i.e., design, installation, maintenance, upgrade). Thus, the CHIL interface facilitates the use of PEC simulators for testing. The CHIL interface can detach the actual PEC from the control logic so testing can be performed with or without an operating PEC and can avoid the need for dedicated and error prone signal conditioning circuitry that is external to the controller.