Patents by Inventor Mark Steven Gorbics

Mark Steven Gorbics has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parallel decimation circuits
    Patent number: 7124159
    Abstract: A decimation system and decimation circuit for decimating waveform data on an oscilloscope. The decimation circuit is implemented using sixteen parallel 16-to-1 multiplexers connected in parallel to a data bus which selectively captures samples based on control signals generated by a sample counting circuit. Decimation factor and phase values can be input to program the amount of decimation performed by the circuit. The decimation system provides even more flexibility in controlling the decimation and is formed by combining several of the decimation circuits with corresponding analog-to-digital converters and memory segments.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: October 17, 2006
    Assignee: LeCroy Corporation
    Inventors: Mark Steven Gorbics, Keith Michael Roberts
  • Parallel decimation circuits
    Patent number: 6859813
    Abstract: A decimation system and decimation circuit for decimating waveform data on an oscilloscope. The decimation circuit is implemented using sixteen parallel 16-to-1 multiplexers connected in parallel to a data bus which selectively captures samples based on control signals generated by a sample counting circuit. Decimation factor and phase values can be input to program the amount of decimation performed by the circuit. The decimation system provides even more flexibility in controlling the decimation and is formed by combining several of the decimation circuits with corresponding analog-to-digital converters and memory segments.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: February 22, 2005
    Assignee: LeCroy Corporation
    Inventors: Mark Steven Gorbics, Keith Michael Roberts
  • Parallel decimation circuits
    Publication number: 20030110194
    Abstract: A decimation system and decimation circuit for decimating waveform data on an oscilloscope. The decimation circuit is implemented using sixteen parallel 16-to-1 multiplexers connected in parallel to a data bus which selectively captures samples based on control signals generated by a sample counting circuit. Decimation factor and phase values can be input to program the amount of decimation performed by the circuit. The decimation system provides even more flexibility in controlling the decimation and is formed by combining several of the decimation circuits with corresponding analog-to-digital converters and memory segments.
    Type: Application
    Filed: December 11, 2001
    Publication date: June 12, 2003
    Inventors: Mark Steven Gorbics, Keith Michael Roberts