Patents by Inventor Mark Stolp

Mark Stolp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiprocessor system assigning system function to each processor in accordance with delay function and maintaining the system function assignment after the system is rebooted
    Patent number: 5857113
    Abstract: An integrated network switch system which can uniquely and consistently detect and designate each processor on a bus without the relative position information, and allow a dynamic reallocation of the processors according to their designations. A pseudo code residing within each processor is implemented to effect the detecting and designating operation of the integrated network switch system. Additionally, a shared RAM and a hardware register which are made accessible to all processors on the bus at a fixed location are used to assist the designating operation of the system, and each processor's memory is used to assist the delaying operation of the system. This assures that tasks among the processors are distributed according to their designations, and that each of the processors can be removed or added without any hard coded information.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: January 5, 1999
    Assignee: Harris Corporation
    Inventors: Shad William Muegge, Paul Henderson, Mark Stolp
  • System for identifying a primary processor and non-primary processors after system reboot independent of processor positions and without using default primary processor identification
    Patent number: 5655149
    Abstract: An integrated network switch system which can uniquely and consistently detect and designate each processor on a bus without the relative position information, and allow a dynamic reallocation of the processors according to their designations. A pseudo code residing within each processor is implemented to effect the detecting and designating operation of the integrated network switch system. Additionally, a shared RAM and a hardware register which are made accessible to all processors on the bus at a fixed location are used to assist the designating operation of the system, and each processor's memory is used to assist the delaying operation of the system. This assures that tasks among the processors are distributed according to their designations, and that each of the processors can be removed or added without any hard coded configuration.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: August 5, 1997
    Assignee: Harris Corporation
    Inventors: Shad William Muegge, Paul Henderson, Mark Stolp