Patents by Inventor Mark T. Pronobis

Mark T. Pronobis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6763340
    Abstract: A novel microelectromechanical system artificial neural network (MEMS ANN) device performs the function of a conventional artificial neural network node element. Micro-machined polysilicon or high aspect ratio composite beam micro-resonators replace as computational elements the silicon transistors and software simulations of prior-art ANNs. The basic MEMSANN device forms a non-linear (e.g., sigmoid) function of a sum of products. Products of the magnitudes of sine waves, applied to the input drive comb and shuttle magnitudes, are formed in the frequency domain and summed by coupling a plurality of resonators with a mechanical coupling frame, or by integrating them into one resonator. A sigmoid function is applied to the sum of products by shaping the overlap capacitance of the output comb fingers of the resonator. Methods of building and using various single MEMS ANN devices and multi-layered arrays of MEMS ANN circuits are also described.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: July 13, 2004
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Daniel J. Burns, David C. Williamson, Mark T. Pronobis
  • Patent number: 4698587
    Abstract: A method for characterizing critical timing paths and analyzing timing related failure modes in high clock rate photocurrent at the drain of a single transistor in a very large scale integrated circuit. The laser testing apparatus utilized with the method of this invention incorporates therein a laser having its output beam focused onto the drain junction of the transistor under test. The localized injection of electromagnetic radiation produces a photocurrent at the drain junction of the transistor at specific times during the testing procedure which increases the logic level transition times associated with that particular node. This causes an increase in the minimum operating power supply and/or a decrease in the maximum operating frequency at which the microcircuit will properly function. Consideration of these parameters and the level of photocurrent provide a measurement related to the worst case timing margin which occurs during the functional test of the integrated microcircuit.
    Type: Grant
    Filed: March 28, 1985
    Date of Patent: October 6, 1987
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Daniel J. Burns, Charles A. Eldering, Mark T. Pronobis