Patents by Inventor Mark T. Robson

Mark T. Robson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7919379
    Abstract: The present invention relates to semiconductor devices, and more particularly to a process and structure for removing a dielectric spacer selective to a surface of a semiconductor substrate with substantially no removal of the semiconductor substrate. The method of the present invention can be integrated into a conventional CMOS processing scheme or into a conventional BiCMOS processing scheme. The method includes forming a field effect transistor on a semiconductor substrate, the FET comprising a dielectric spacer and the gate structure, the dielectric spacer located adjacent a sidewall of the gate structure and over a source/drain region in the semiconductor substrate; depositing a first nitride layer over the FET; and removing the nitride layer and the dielectric spacer selective to the semiconductor substrate with substantially no removal of the semiconductor substrate.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: April 5, 2011
    Assignee: International Business Machines Corporation
    Inventors: Eduard A. Cartier, Rashmi Jha, Sivananda Kanakasabapathy, Xi Li, Renee T. Mo, Vijay Narayanan, Vamsi Paruchuri, Mark T. Robson, Kathryn T. Schonenberg, Michelle L. Steen, Richard Wise, Ying Zhang
  • Publication number: 20090065817
    Abstract: The present invention relates to semiconductor devices, and more particularly to a process and structure for removing a dielectric spacer selective to a surface of a semiconductor substrate with substantially no removal of the semiconductor substrate. The method of the present invention can be integrated into a conventional CMOS processing scheme or into a conventional BiCMOS processing scheme. The method includes forming a field effect transistor on a semiconductor substrate, the FET comprising a dielectric spacer and the gate structure, the dielectric spacer located adjacent a sidewall of the gate structure and over a source/drain region in the semiconductor substrate; depositing a first nitride layer over the FET; and removing the nitride layer and the dielectric spacer selective to the semiconductor substrate with substantially no removal of the semiconductor substrate.
    Type: Application
    Filed: September 10, 2007
    Publication date: March 12, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eduard A. Cartier, Rashmi Jha, Sivananda Kanakasabapathy, Xi Li, Renee T. Mo, Vijay Narayanan, Vamsi Paruchuri, Mark T. Robson, Kathryn T. Schonenberg, Michelle L. Steen, Richard Wise, Ying Zhang