Abstract: A laser imager for a printing system, comprising a plurality of independently addressable surface emitting lasers arranged in a linear array on a common substrate chip and including a common cathode and a dedicated control channel associated with an address trace line for each laser of the plurality of independently addressable surface emitting lasers, and optical elements arranged in a linear lens array configured to capture and focus light from the plurality of independently addressable surface emitting lasers onto a imaging member, wherein the plurality of independently addressable surface emitting lasers arranged in a linear array and the optical elements arranged in a linear lens array operate together to image the imaging member.

Abstract: A laser imager for a printing system, comprising a plurality of independently addressable surface emitting lasers arranged in a linear array on a common substrate chip and including a common cathode and a dedicated control channel associated with an address trace line for each laser of the plurality of independently addressable surface emitting lasers, and optical elements arranged in a linear lens array configured to capture and focus light from the plurality of independently addressable surface emitting lasers onto a imaging member, wherein the plurality of independently addressable surface emitting lasers arranged in a linear array and the optical elements arranged in a linear lens array operate together to image the imaging member.

Abstract: A method of transferring a semiconductor epi layer onto a metal host substrate is described. An epi layer of a semiconductor chip (e.g., semiconductor laser array) including a substrate can be mounted onto a planar handle wafer with an adhesive, wherein a backside of the substrate faces upward and away from the epi layer and the planar handle wafer. The backside of the substrate can be treated to substantially remove the substrate, while leaving the epi layer undamaged (e.g., by polishing to where no more than 20 micrometers of the substrate remains). Metal can be formed on the treated backside resulting in a metalized backside. The planar handle wafer can then be removed from the epi layer by dissolving the adhesive with a solvent, wherein a modified semiconductor chip remains. The semiconductor chip can be annealed to form a backside ohmic contact interface. The semiconductor chip can then be attached to a mechanical block by the ohmic contact interface.

Abstract: A 3D package for semiconductor thermal management can include a 3D submount forming a mechanical block including at least one embedded channel formed within the mechanical block and configured to accept cooling liquid therethrough, a first tubular connection for providing cooling liquid to the at least one embedded channel, and a second tubular connection for removing cooling liquid from the at least one embedded channel. Integrated slots can be provided for accepting and mounting semiconductor components. Mounting holes can be formed in the mechanical block for securing optical elements. At least one semiconductor laser array die can be secured to the mechanical block at the integrated slots, wherein the at least one semiconductor laser array die is kept cool by the cooling liquid flowing through the at least one embedded channel.

Abstract: A corrosion monitoring system includes one or more objects coupled to respective portions of a transformer tank. The one or more objects are configured to corrode before the respective portions of the transformer tank. At least one optical sensor is coupled to each of the objects. The at least one optical sensor has an optical output that changes in response to strain of the object. An analyzer is coupled to the at least one optical sensor. The analyzer is configured to perform one or more of detecting and predicting corrosion of the transformer tank based on the output of the at least one optical sensor.

Abstract: A corrosion monitoring system includes one or more objects coupled to respective portions of a transformer tank. The one or more objects are configured to corrode before the respective portions of the transformer tank. At least one optical sensor is coupled to each of the objects. The at least one optical sensor has an optical output that changes in response to strain of the object. An analyzer is coupled to the at least one optical sensor. The analyzer is configured to perform one or more of detecting and predicting corrosion of the transformer tank based on the output of the at least one optical sensor.

Abstract: A corrosion monitoring system includes one or more objects coupled to respective portions of a transformer tank. The one or more objects are configured to corrode before the respective portions of the transformer tank. At least one optical sensor is coupled to each of the objects. The at least one optical sensor has an optical output that changes in response to strain of the object. An analyzer is coupled to the at least one optical sensor. The analyzer is configured to perform one or more of detecting and predicting corrosion of the transformer tank based on the output of the at least one optical sensor.

Abstract: An edge emitting structure includes an active region configured to generate radiation in response to excitation by a pumping beam incident on the structure. A front facet of the edge emitting structure is configured to emit the radiation generated by the active region. A metallic reflective coating disposed on at least one of the front and rear facets of the edge emitting structure. The metallic reflective coating is configured to reflect the radiation generated by the active region.

Abstract: An edge emitting structure includes an active region configured to generate radiation in response to excitation by a pumping beam incident on the structure. A front facet of the edge emitting structure is configured to emit the radiation generated by the active region. A metallic reflective coating disposed on at least one of the front and rear facets of the edge emitting structure. The metallic reflective coating is configured to reflect the radiation generated by the active region.

Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.

Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.

Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.

Abstract: A GaN/AlN superlattice is formed over a GaN/sapphire template structure, serving in part as a strain relief layer for growth of subsequent layers (e.g., deep UV light emitting diodes). The GaN/AlN superlattice mitigates the strain between a GaN/sapphire template and a multiple quantum well heterostructure active region, allowing the use of high Al mole fraction in the active region, and therefore emission in the deep UV wavelengths.

Abstract: A GaN/AlN superlattice is formed over a GaN/sapphire template structure, serving in part as a strain relief layer for growth of subsequent layers (e.g., deep UV light emitting diodes). The GaN/AlN superlattice mitigates the strain between a GaN/sapphire template and a multiple quantum well heterostructure active region, allowing the use of high Al mole fraction in the active region, and therefore emission in the deep UV wavelengths.

Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.

Abstract: A GaN/AlN superlattice is formed over a GaN/sapphire template structure, serving in part as a strain relief layer for growth of subsequent layers (e.g., deep UV light emitting diodes). The GaN/AlN superlattice mitigates the strain between a GaN/sapphire template and a multiple quantum well heterostructure active region, allowing the use of high Al mole fraction in the active region, and therefore emission in the deep UV wavelengths.

Abstract: A system and method for providing improved surface quality following removal of a substrate and template layers from a semiconductor structure provides an improved surface quality for a layer (such as a quantum well heterostructure active region) prior to bonding a heat sink/conductive substrate to the structure. Following the physical removal of a sapphire substrate, a sacrificial coating such as a spin-coat polymer photoresist is applied to an exposed GaN surface. This sacrificial coating provides a planar surface, generally parallel to the planes of the interfaces of the underlying layers. The sacrificial coating and etching conditions are selected such that the etch rate of the sacrificial coating approximately matches the etch rate of GaN and the underlying layers, so that the physical surface profile during etching approximates the physical surface profile of the sacrificial coating prior to etching.

Abstract: A system and method for providing improved surface quality following removal of a substrate and template layers from a semiconductor structure provides an improved surface quality for a layer (such as a quantum well heterostructure active region) prior to bonding a heat sink/conductive substrate to the structure. Following the physical removal of a sapphire substrate, a sacrificial coating such as a spin-coat polymer photoresist is applied to an exposed GaN surface. This sacrificial coating provides a planar surface, generally parallel to the planes of the interfaces of the underlying layers. The sacrificial coating and etching conditions are selected such that the etch rate of the sacrificial coating approximately matches the etch rate of GaN and the underlying layers, so that the physical surface profile during etching approximates the physical surface profile of the sacrificial coating prior to etching.

Abstract: A system and method for providing improved surface quality following removal of a substrate and template layers from a semiconductor structure provides an improved surface quality for a layer (such as a quantum well heterostructure active region) prior to bonding a heat sink/conductive substrate to the structure. Following the physical removal of a sapphire substrate, a sacrificial coating such as a spin-coat polymer photoresist is applied to an exposed GaN surface. This sacrificial coating provides a planar surface, generally parallel to the planes of the interfaces of the underlying layers. The sacrificial coating and etching conditions are selected such that the etch rate of the sacrificial coating approximately matches the etch rate of GaN and the underlying layers, so that the physical surface profile during etching approximates the physical surface profile of the sacrificial coating prior to etching.

Abstract: A GaN/AlN superlattice is formed over a GaN/sapphire template structure, serving in part as a strain relief layer for growth of subsequent layers (e.g., deep UV light emitting diodes). The GaN/AlN superlattice mitigates the strain between a GaN/sapphire template and a multiple quantum well heterostructure active region, allowing the use of high Al mole fraction in the active region, and therefore emission in the deep UV wavelengths.