Patents by Inventor Mark Tracy
Mark Tracy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10141462Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.Type: GrantFiled: December 19, 2016Date of Patent: November 27, 2018Assignee: SunPower CorporationInventors: David D. Smith, Ann Waldhauer, Venkatasubramani Balu, Kieran Mark Tracy
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Publication number: 20180209963Abstract: The invention features a method of identifying therapeutically relevant compositions which include a therapeutic agent and 2,2-dimethylaminomethyl-[1-3]-dioxolane by screening for an effect of the agent on the liver of a model subject.Type: ApplicationFiled: September 1, 2017Publication date: July 26, 2018Applicant: Arbutus Biopharma CorporationInventors: Marco A. Ciufolini, Thomas D. Madden, Michael J. Hope, Barbara Mui, Antonin de Fougerolles, Tatiana Novobrantseva, Anna Borodovsky, Akin Akinc, Mark Tracy, Pieter Rutter Cullis
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Patent number: 10030303Abstract: Sputter tools are described. In one embodiment, an apparatus to support a wafer includes a pallet having a depression to receive the wafer. The pallet includes an opening below the depression, and an edge in the depression is to support the wafer over the opening. A cover at least partially covers the opening. In one example, the cover may be a plate with one or more holes, and a pipe may be located below each of the holes in the cover. In one embodiment, a wafer-processing system includes a processing chamber and a pallet with a depression to receive a wafer. The pallet has an opening below the depression, and an edge in the depression supports the wafer over the opening. In one such embodiment, a cover at least partially covers the opening. According to one embodiment, an energy-absorbing material is disposed below the opening in the pallet.Type: GrantFiled: December 19, 2014Date of Patent: July 24, 2018Assignees: SunPower Corporation, Total Marketing ServicesInventors: Yu-Chen Shen, Taiqing Qiu, Robert Woehl, Kieran Mark Tracy, Mukul Agrawal
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Publication number: 20180175221Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.Type: ApplicationFiled: December 19, 2016Publication date: June 21, 2018Inventors: David D. Smith, Ann Waldhauer, Venkatasubramani Balu, Kieran Mark Tracy
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Publication number: 20180138354Abstract: A curing tool for fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a curing tool combines a UV-exposure stage and one or more of a deposition or an annealing stage to fabricate a solar cell. For example, a radiation curing stage can precede a back end processing stage used to perform operations on a back contact solar cell. The curing tool can therefore be used to perform a method to improve UV stability of solar cells.Type: ApplicationFiled: November 9, 2017Publication date: May 17, 2018Inventors: Périne Jaffrennou, Gilles Olav Tanguy Sylvain Poulain, Kieran Mark Tracy, Taiqing Qiu, Michael C. Johnson, Seung Bum Rim
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Publication number: 20180129010Abstract: An optical cable assembly is provided. The cable assembly includes a plurality of subunits surrounded by an outer cable jacket, a furcation unit and optical connectors coupled to the end of each of the subunits. Each of the subunits includes an inner jacket, a plurality of optical fibers; and a tensile strength element. The first tensile strength element and the inner jackets of each subunits are coupled to the furcation unit, and the optical fibers and tensile strength elements of each subunit extend through the furcation unit without being coupled to the furcation unit. The subunit tensile strength element and optical fibers of each subunit are balanced such that both experience axial loading applied to the assembly and, under various loading conditions, the compression of the subunits is controlled and/or the axial loading of the optical fibers is limited to allow proper function of the optical connector.Type: ApplicationFiled: December 20, 2017Publication date: May 10, 2018Inventors: William Eric Caldwell, Terry Lee Ellis, William Carl Hurley, William Welch McCollough, Mark Tracy Paap
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Publication number: 20180040746Abstract: Methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A Group III-nitride material layer is disposed above the passivating dielectric layer. In another example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A large direct band gap material layer is disposed above the passivating dielectric layer, the large direct band gap material layer having an energy gap (Eg) of at least approximately 3.3. An anti-reflective coating (ARC) layer disposed on the large direct band gap material layer, the ARC layer comprising a material different from the large direct band gap material layer.Type: ApplicationFiled: October 13, 2017Publication date: February 8, 2018Inventors: Michael C. Johnson, Kieran Mark Tracy, Seung Bum Rim, Jara Fernandez Martin, Périne Jaffrennou, Julien Penaud
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Patent number: 9825191Abstract: Methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A Group III-nitride material layer is disposed above the passivating dielectric layer. In another example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A large direct band gap material layer is disposed above the passivating dielectric layer, the large direct band gap material layer having an energy gap (Eg) of at least approximately 3.3. An anti-reflective coating (ARC) layer disposed on the large direct band gap material layer, the ARC layer comprising a material different from the large direct band gap material layer.Type: GrantFiled: June 27, 2014Date of Patent: November 21, 2017Assignees: SunPower Corporation, Total Marketing ServicesInventors: Michael C. Johnson, Kieran Mark Tracy, Seung Bum Rim, Jara Fernandez Martin, Périne Jaffrennou, Julien Penaud
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Publication number: 20170288070Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.Type: ApplicationFiled: April 1, 2016Publication date: October 5, 2017Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
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Publication number: 20170222072Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.Type: ApplicationFiled: April 20, 2017Publication date: August 3, 2017Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu
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Patent number: 9690068Abstract: An optical cable assembly is provided. The cable assembly includes a plurality of subunits surrounded by an outer cable jacket, a furcation unit and optical connectors coupled to the end of each of the subunits. Each of the subunits includes an inner jacket, a plurality of optical fibers; and a tensile strength element. The first tensile strength element and the inner jackets of each subunits are coupled to the furcation unit, and the optical fibers and tensile strength elements of each subunit extend through the furcation unit without being coupled to the furcation unit. The subunit tensile strength element and optical fibers of each subunit are balanced such that both experience axial loading applied to the assembly and, under various loading conditions, the compression of the subunits is controlled and/or the axial loading of the optical fibers is limited to allow proper function of the optical connector.Type: GrantFiled: June 23, 2016Date of Patent: June 27, 2017Assignee: CORNING OPTICAL COMMUNICATIONS LLCInventors: William Carl Hurley, William Welch McCollough, Mark Tracy Paap, Terry Lee Ellis, William Eric Caldwell, Rebecca Elizabeth Sistare
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Publication number: 20170149383Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.Type: ApplicationFiled: February 6, 2017Publication date: May 25, 2017Inventors: Xiuwen Tu, David Aitan Soltz, Michael C. Johnson, Seung Bum Rim, Taiqing Qiu, Yu-Chen Shen, Kieran Mark Tracy
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Patent number: 9634177Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.Type: GrantFiled: October 21, 2015Date of Patent: April 25, 2017Assignee: SunPower CorporationInventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu
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Patent number: 9568691Abstract: An optical fiber assembly including an optical fiber ribbon and an optical connector is provided. The optical fiber ribbon includes a ribbon matrix, a first group of optical fibers embedded in the ribbon matrix, a second group of optical fibers embedded in the ribbon matrix, and a split in the ribbon matrix at a first end of the ribbon forming a space between a first end of the first group of optical fibers and a first end of the second group of optical fibers. The optical connector includes a body, a first array of openings defined in the body, and a second array of openings defined in the body. The second array is spaced from the first array. The bond between the ribbon matrix and the optical fibers prevents elongation of the split.Type: GrantFiled: June 12, 2013Date of Patent: February 14, 2017Assignee: CORNING OPTICAL COMMUNICATIONS LLCInventors: William Carl Hurley, Eric Raymond Logan, Mark Tracy Paap
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Patent number: 9564854Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.Type: GrantFiled: May 6, 2015Date of Patent: February 7, 2017Assignee: SunPower CorporationInventors: Xiuwen Tu, David Aitan Soltz, Michael C. Johnson, Seung Bum Rim, Taiqing Qiu, Yu-Chen Shen, Kieran Mark Tracy
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Publication number: 20170003468Abstract: An optical cable assembly is provided. The cable assembly includes a plurality of subunits surrounded by an outer cable jacket, a furcation unit and optical connectors coupled to the end of each of the subunits. Each of the subunits includes an inner jacket, a plurality of optical fibers; and a tensile strength element. The first tensile strength element and the inner jackets of each subunits are coupled to the furcation unit, and the optical fibers and tensile strength elements of each subunit extend through the furcation unit without being coupled to the furcation unit. The subunit tensile strength element and optical fibers of each subunit are balanced such that both experience axial loading applied to the assembly and, under various loading conditions, the compression of the subunits is controlled and/or the axial loading of the optical fibers is limited to allow proper function of the optical connector.Type: ApplicationFiled: June 23, 2016Publication date: January 5, 2017Inventors: William Carl Hurley, William Welch McCollough, Mark Tracy Paap, Terry Lee Ellis, William Eric Caldwell, Rebecca Elizabeth Sistare
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Publication number: 20160329864Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.Type: ApplicationFiled: May 6, 2015Publication date: November 10, 2016Inventors: Xiuwen Tu, David Aitan Soltz, Michael C. Johnson, Seung Bum Rim, Taiqing Qiu, Yu-Chen Shen, Kieran Mark Tracy
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Publication number: 20160274089Abstract: The invention features a method of identifying therapeutically relevant compositions which include a therapeutic agent and 2,2-dimethylaminomethyl-[1-3]-dioxolane by screening for an effect of the agent on the liver of a model subject.Type: ApplicationFiled: October 30, 2015Publication date: September 22, 2016Inventors: Marco A. Ciufolini, Thomas D. Madden, Michael J. Hope, Barbara Mui, Antonin de Fougerolles, Tatiana Novobrantseva, Anna Borodovsky, Akin Akinc, Mark Tracy, Pieter Rutter Cullis
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Publication number: 20160177439Abstract: Sputter tools are described. In one embodiment, an apparatus to support a wafer includes a pallet having a depression to receive the wafer. The pallet includes an opening below the depression, and an edge in the depression is to support the wafer over the opening. A cover at least partially covers the opening. In one example, the cover may be a plate with one or more holes, and a pipe may be located below each of the holes in the cover. In one embodiment, a wafer-processing system includes a processing chamber and a pallet with a depression to receive a wafer. The pallet has an opening below the depression, and an edge in the depression supports the wafer over the opening. In one such embodiment, a cover at least partially covers the opening. According to one embodiment, an energy-absorbing material is disposed below the opening in the pallet.Type: ApplicationFiled: December 19, 2014Publication date: June 23, 2016Inventors: Yu-Chen Shen, Taiqing Qiu, Robe Woehl, Kieran Mark Tracy, Mukul Agrawal
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Publication number: 20160043267Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.Type: ApplicationFiled: October 21, 2015Publication date: February 11, 2016Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu